[llvm] 263bef2 - [X86] Make combineCMov not create unsupported FCMOVs when f32/f64 are using X87.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 21 00:35:18 PST 2020
Author: Craig Topper
Date: 2020-02-21T00:34:15-08:00
New Revision: 263bef2bbcb0b3bad1f9113a638d6e6c92920a6b
URL: https://github.com/llvm/llvm-project/commit/263bef2bbcb0b3bad1f9113a638d6e6c92920a6b
DIFF: https://github.com/llvm/llvm-project/commit/263bef2bbcb0b3bad1f9113a638d6e6c92920a6b.diff
LOG: [X86] Make combineCMov not create unsupported FCMOVs when f32/f64 are using X87.
This makes the behavior consistent with what's in LowerSELECT.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/cmov-fp.ll
llvm/test/CodeGen/X86/pseudo_cmov_lower.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index acb258b21f24..8fd4e4d85c57 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -39250,7 +39250,10 @@ static SDValue combineCMov(SDNode *N, SelectionDAG &DAG,
// Try to simplify the EFLAGS and condition code operands.
// We can't always do this as FCMOV only supports a subset of X86 cond.
if (SDValue Flags = combineSetCCEFLAGS(Cond, CC, DAG, Subtarget)) {
- if (FalseOp.getValueType() != MVT::f80 || hasFPCMov(CC)) {
+ if (!(FalseOp.getValueType() == MVT::f80 ||
+ (FalseOp.getValueType() == MVT::f64 && !Subtarget.hasSSE2()) ||
+ (FalseOp.getValueType() == MVT::f32 && !Subtarget.hasSSE1())) ||
+ hasFPCMov(CC)) {
SDValue Ops[] = {FalseOp, TrueOp, DAG.getTargetConstant(CC, DL, MVT::i8),
Flags};
return DAG.getNode(X86ISD::CMOV, DL, N->getValueType(0), Ops);
diff --git a/llvm/test/CodeGen/X86/cmov-fp.ll b/llvm/test/CodeGen/X86/cmov-fp.ll
index fbbefa895594..4d02666f187a 100644
--- a/llvm/test/CodeGen/X86/cmov-fp.ll
+++ b/llvm/test/CodeGen/X86/cmov-fp.ll
@@ -284,13 +284,11 @@ define double @test5(i32 %a, i32 %b, double %x) nounwind {
; NOSSE2-NEXT: fldl {{[0-9]+}}(%esp)
; NOSSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE2-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE2-NEXT: setg %al
+; NOSSE2-NEXT: testb %al, %al
; NOSSE2-NEXT: flds {{\.LCPI.*}}
-; NOSSE2-NEXT: jg .LBB4_2
-; NOSSE2-NEXT: # %bb.1:
-; NOSSE2-NEXT: fstp %st(0)
-; NOSSE2-NEXT: fldz
; NOSSE2-NEXT: fxch %st(1)
-; NOSSE2-NEXT: .LBB4_2:
+; NOSSE2-NEXT: fcmovne %st(1), %st
; NOSSE2-NEXT: fstp %st(1)
; NOSSE2-NEXT: retl
;
@@ -299,13 +297,11 @@ define double @test5(i32 %a, i32 %b, double %x) nounwind {
; NOSSE1-NEXT: fldl {{[0-9]+}}(%esp)
; NOSSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE1-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE1-NEXT: setg %al
+; NOSSE1-NEXT: testb %al, %al
; NOSSE1-NEXT: flds {{\.LCPI.*}}
-; NOSSE1-NEXT: jg .LBB4_2
-; NOSSE1-NEXT: # %bb.1:
-; NOSSE1-NEXT: fstp %st(0)
-; NOSSE1-NEXT: fldz
; NOSSE1-NEXT: fxch %st(1)
-; NOSSE1-NEXT: .LBB4_2:
+; NOSSE1-NEXT: fcmovne %st(1), %st
; NOSSE1-NEXT: fstp %st(1)
; NOSSE1-NEXT: retl
;
@@ -314,8 +310,10 @@ define double @test5(i32 %a, i32 %b, double %x) nounwind {
; NOCMOV-NEXT: fldl {{[0-9]+}}(%esp)
; NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOCMOV-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: setg %al
+; NOCMOV-NEXT: testb %al, %al
; NOCMOV-NEXT: flds {{\.LCPI.*}}
-; NOCMOV-NEXT: jg .LBB4_2
+; NOCMOV-NEXT: jne .LBB4_2
; NOCMOV-NEXT: # %bb.1:
; NOCMOV-NEXT: fstp %st(0)
; NOCMOV-NEXT: fldz
@@ -355,13 +353,11 @@ define double @test6(i32 %a, i32 %b, double %x) nounwind {
; NOSSE2-NEXT: fldl {{[0-9]+}}(%esp)
; NOSSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE2-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE2-NEXT: setge %al
+; NOSSE2-NEXT: testb %al, %al
; NOSSE2-NEXT: flds {{\.LCPI.*}}
-; NOSSE2-NEXT: jge .LBB5_2
-; NOSSE2-NEXT: # %bb.1:
-; NOSSE2-NEXT: fstp %st(0)
-; NOSSE2-NEXT: fldz
; NOSSE2-NEXT: fxch %st(1)
-; NOSSE2-NEXT: .LBB5_2:
+; NOSSE2-NEXT: fcmovne %st(1), %st
; NOSSE2-NEXT: fstp %st(1)
; NOSSE2-NEXT: retl
;
@@ -370,13 +366,11 @@ define double @test6(i32 %a, i32 %b, double %x) nounwind {
; NOSSE1-NEXT: fldl {{[0-9]+}}(%esp)
; NOSSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE1-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE1-NEXT: setge %al
+; NOSSE1-NEXT: testb %al, %al
; NOSSE1-NEXT: flds {{\.LCPI.*}}
-; NOSSE1-NEXT: jge .LBB5_2
-; NOSSE1-NEXT: # %bb.1:
-; NOSSE1-NEXT: fstp %st(0)
-; NOSSE1-NEXT: fldz
; NOSSE1-NEXT: fxch %st(1)
-; NOSSE1-NEXT: .LBB5_2:
+; NOSSE1-NEXT: fcmovne %st(1), %st
; NOSSE1-NEXT: fstp %st(1)
; NOSSE1-NEXT: retl
;
@@ -385,8 +379,10 @@ define double @test6(i32 %a, i32 %b, double %x) nounwind {
; NOCMOV-NEXT: fldl {{[0-9]+}}(%esp)
; NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOCMOV-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: setge %al
+; NOCMOV-NEXT: testb %al, %al
; NOCMOV-NEXT: flds {{\.LCPI.*}}
-; NOCMOV-NEXT: jge .LBB5_2
+; NOCMOV-NEXT: jne .LBB5_2
; NOCMOV-NEXT: # %bb.1:
; NOCMOV-NEXT: fstp %st(0)
; NOCMOV-NEXT: fldz
@@ -426,13 +422,11 @@ define double @test7(i32 %a, i32 %b, double %x) nounwind {
; NOSSE2-NEXT: fldl {{[0-9]+}}(%esp)
; NOSSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE2-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE2-NEXT: setl %al
+; NOSSE2-NEXT: testb %al, %al
; NOSSE2-NEXT: flds {{\.LCPI.*}}
-; NOSSE2-NEXT: jl .LBB6_2
-; NOSSE2-NEXT: # %bb.1:
-; NOSSE2-NEXT: fstp %st(0)
-; NOSSE2-NEXT: fldz
; NOSSE2-NEXT: fxch %st(1)
-; NOSSE2-NEXT: .LBB6_2:
+; NOSSE2-NEXT: fcmovne %st(1), %st
; NOSSE2-NEXT: fstp %st(1)
; NOSSE2-NEXT: retl
;
@@ -441,13 +435,11 @@ define double @test7(i32 %a, i32 %b, double %x) nounwind {
; NOSSE1-NEXT: fldl {{[0-9]+}}(%esp)
; NOSSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE1-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE1-NEXT: setl %al
+; NOSSE1-NEXT: testb %al, %al
; NOSSE1-NEXT: flds {{\.LCPI.*}}
-; NOSSE1-NEXT: jl .LBB6_2
-; NOSSE1-NEXT: # %bb.1:
-; NOSSE1-NEXT: fstp %st(0)
-; NOSSE1-NEXT: fldz
; NOSSE1-NEXT: fxch %st(1)
-; NOSSE1-NEXT: .LBB6_2:
+; NOSSE1-NEXT: fcmovne %st(1), %st
; NOSSE1-NEXT: fstp %st(1)
; NOSSE1-NEXT: retl
;
@@ -456,8 +448,10 @@ define double @test7(i32 %a, i32 %b, double %x) nounwind {
; NOCMOV-NEXT: fldl {{[0-9]+}}(%esp)
; NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOCMOV-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: setl %al
+; NOCMOV-NEXT: testb %al, %al
; NOCMOV-NEXT: flds {{\.LCPI.*}}
-; NOCMOV-NEXT: jl .LBB6_2
+; NOCMOV-NEXT: jne .LBB6_2
; NOCMOV-NEXT: # %bb.1:
; NOCMOV-NEXT: fstp %st(0)
; NOCMOV-NEXT: fldz
@@ -497,13 +491,11 @@ define double @test8(i32 %a, i32 %b, double %x) nounwind {
; NOSSE2-NEXT: fldl {{[0-9]+}}(%esp)
; NOSSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE2-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE2-NEXT: setle %al
+; NOSSE2-NEXT: testb %al, %al
; NOSSE2-NEXT: flds {{\.LCPI.*}}
-; NOSSE2-NEXT: jle .LBB7_2
-; NOSSE2-NEXT: # %bb.1:
-; NOSSE2-NEXT: fstp %st(0)
-; NOSSE2-NEXT: fldz
; NOSSE2-NEXT: fxch %st(1)
-; NOSSE2-NEXT: .LBB7_2:
+; NOSSE2-NEXT: fcmovne %st(1), %st
; NOSSE2-NEXT: fstp %st(1)
; NOSSE2-NEXT: retl
;
@@ -512,13 +504,11 @@ define double @test8(i32 %a, i32 %b, double %x) nounwind {
; NOSSE1-NEXT: fldl {{[0-9]+}}(%esp)
; NOSSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE1-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE1-NEXT: setle %al
+; NOSSE1-NEXT: testb %al, %al
; NOSSE1-NEXT: flds {{\.LCPI.*}}
-; NOSSE1-NEXT: jle .LBB7_2
-; NOSSE1-NEXT: # %bb.1:
-; NOSSE1-NEXT: fstp %st(0)
-; NOSSE1-NEXT: fldz
; NOSSE1-NEXT: fxch %st(1)
-; NOSSE1-NEXT: .LBB7_2:
+; NOSSE1-NEXT: fcmovne %st(1), %st
; NOSSE1-NEXT: fstp %st(1)
; NOSSE1-NEXT: retl
;
@@ -527,8 +517,10 @@ define double @test8(i32 %a, i32 %b, double %x) nounwind {
; NOCMOV-NEXT: fldl {{[0-9]+}}(%esp)
; NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOCMOV-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: setle %al
+; NOCMOV-NEXT: testb %al, %al
; NOCMOV-NEXT: flds {{\.LCPI.*}}
-; NOCMOV-NEXT: jle .LBB7_2
+; NOCMOV-NEXT: jne .LBB7_2
; NOCMOV-NEXT: # %bb.1:
; NOCMOV-NEXT: fstp %st(0)
; NOCMOV-NEXT: fldz
@@ -841,13 +833,11 @@ define float @test13(i32 %a, i32 %b, float %x) nounwind {
; NOSSE1-NEXT: flds {{[0-9]+}}(%esp)
; NOSSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE1-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE1-NEXT: setg %al
+; NOSSE1-NEXT: testb %al, %al
; NOSSE1-NEXT: flds {{\.LCPI.*}}
-; NOSSE1-NEXT: jg .LBB12_2
-; NOSSE1-NEXT: # %bb.1:
-; NOSSE1-NEXT: fstp %st(0)
-; NOSSE1-NEXT: fldz
; NOSSE1-NEXT: fxch %st(1)
-; NOSSE1-NEXT: .LBB12_2:
+; NOSSE1-NEXT: fcmovne %st(1), %st
; NOSSE1-NEXT: fstp %st(1)
; NOSSE1-NEXT: retl
;
@@ -856,8 +846,10 @@ define float @test13(i32 %a, i32 %b, float %x) nounwind {
; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
; NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOCMOV-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: setg %al
+; NOCMOV-NEXT: testb %al, %al
; NOCMOV-NEXT: flds {{\.LCPI.*}}
-; NOCMOV-NEXT: jg .LBB12_2
+; NOCMOV-NEXT: jne .LBB12_2
; NOCMOV-NEXT: # %bb.1:
; NOCMOV-NEXT: fstp %st(0)
; NOCMOV-NEXT: fldz
@@ -910,13 +902,11 @@ define float @test14(i32 %a, i32 %b, float %x) nounwind {
; NOSSE1-NEXT: flds {{[0-9]+}}(%esp)
; NOSSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE1-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE1-NEXT: setge %al
+; NOSSE1-NEXT: testb %al, %al
; NOSSE1-NEXT: flds {{\.LCPI.*}}
-; NOSSE1-NEXT: jge .LBB13_2
-; NOSSE1-NEXT: # %bb.1:
-; NOSSE1-NEXT: fstp %st(0)
-; NOSSE1-NEXT: fldz
; NOSSE1-NEXT: fxch %st(1)
-; NOSSE1-NEXT: .LBB13_2:
+; NOSSE1-NEXT: fcmovne %st(1), %st
; NOSSE1-NEXT: fstp %st(1)
; NOSSE1-NEXT: retl
;
@@ -925,8 +915,10 @@ define float @test14(i32 %a, i32 %b, float %x) nounwind {
; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
; NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOCMOV-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: setge %al
+; NOCMOV-NEXT: testb %al, %al
; NOCMOV-NEXT: flds {{\.LCPI.*}}
-; NOCMOV-NEXT: jge .LBB13_2
+; NOCMOV-NEXT: jne .LBB13_2
; NOCMOV-NEXT: # %bb.1:
; NOCMOV-NEXT: fstp %st(0)
; NOCMOV-NEXT: fldz
@@ -979,13 +971,11 @@ define float @test15(i32 %a, i32 %b, float %x) nounwind {
; NOSSE1-NEXT: flds {{[0-9]+}}(%esp)
; NOSSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE1-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE1-NEXT: setl %al
+; NOSSE1-NEXT: testb %al, %al
; NOSSE1-NEXT: flds {{\.LCPI.*}}
-; NOSSE1-NEXT: jl .LBB14_2
-; NOSSE1-NEXT: # %bb.1:
-; NOSSE1-NEXT: fstp %st(0)
-; NOSSE1-NEXT: fldz
; NOSSE1-NEXT: fxch %st(1)
-; NOSSE1-NEXT: .LBB14_2:
+; NOSSE1-NEXT: fcmovne %st(1), %st
; NOSSE1-NEXT: fstp %st(1)
; NOSSE1-NEXT: retl
;
@@ -994,8 +984,10 @@ define float @test15(i32 %a, i32 %b, float %x) nounwind {
; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
; NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOCMOV-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: setl %al
+; NOCMOV-NEXT: testb %al, %al
; NOCMOV-NEXT: flds {{\.LCPI.*}}
-; NOCMOV-NEXT: jl .LBB14_2
+; NOCMOV-NEXT: jne .LBB14_2
; NOCMOV-NEXT: # %bb.1:
; NOCMOV-NEXT: fstp %st(0)
; NOCMOV-NEXT: fldz
@@ -1048,13 +1040,11 @@ define float @test16(i32 %a, i32 %b, float %x) nounwind {
; NOSSE1-NEXT: flds {{[0-9]+}}(%esp)
; NOSSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOSSE1-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOSSE1-NEXT: setle %al
+; NOSSE1-NEXT: testb %al, %al
; NOSSE1-NEXT: flds {{\.LCPI.*}}
-; NOSSE1-NEXT: jle .LBB15_2
-; NOSSE1-NEXT: # %bb.1:
-; NOSSE1-NEXT: fstp %st(0)
-; NOSSE1-NEXT: fldz
; NOSSE1-NEXT: fxch %st(1)
-; NOSSE1-NEXT: .LBB15_2:
+; NOSSE1-NEXT: fcmovne %st(1), %st
; NOSSE1-NEXT: fstp %st(1)
; NOSSE1-NEXT: retl
;
@@ -1063,8 +1053,10 @@ define float @test16(i32 %a, i32 %b, float %x) nounwind {
; NOCMOV-NEXT: flds {{[0-9]+}}(%esp)
; NOCMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
; NOCMOV-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; NOCMOV-NEXT: setle %al
+; NOCMOV-NEXT: testb %al, %al
; NOCMOV-NEXT: flds {{\.LCPI.*}}
-; NOCMOV-NEXT: jle .LBB15_2
+; NOCMOV-NEXT: jne .LBB15_2
; NOCMOV-NEXT: # %bb.1:
; NOCMOV-NEXT: fstp %st(0)
; NOCMOV-NEXT: fldz
diff --git a/llvm/test/CodeGen/X86/pseudo_cmov_lower.ll b/llvm/test/CodeGen/X86/pseudo_cmov_lower.ll
index c59e3478ff51..3e36c830ee27 100644
--- a/llvm/test/CodeGen/X86/pseudo_cmov_lower.ll
+++ b/llvm/test/CodeGen/X86/pseudo_cmov_lower.ll
@@ -66,8 +66,8 @@ entry:
; This test checks that only a single js gets generated in the final code
; for lowering the CMOV pseudos that get created for this IR.
; CHECK-LABEL: foo4:
-; CHECK: js
-; CHECK-NOT: js
+; CHECK: jne
+; CHECK-NOT: jne
define float @foo4(i32 %v1, float %v2, float %v3, float %v4) nounwind {
entry:
%cmp = icmp slt i32 %v1, 0
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