[PATCH] D72805: [X86] Remove X86ISD::FILD_FLAG and stop gluing nodes together.

Sat Jan 18 06:57:38 PST 2020

RKSimon accepted this revision.
RKSimon added subscribers: scanon, andrew.w.kaylor.
RKSimon added a comment.
This revision is now accepted and ready to land.

Cheers Craig, TBH I'm left wondering whether we should tweak the update script to always keep stack arithmetic for x86 - do you think they'd be too much churn?

Anyway, LGTM as a first step, but it highlights a number of topics for further possible work (nothing new there......).

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Comment at: llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll:636
 ; AVX-32:       # %bb.0:
 ; AVX-32-NEXT:    pushl %ebp
 ; AVX-32-NEXT:    .cfi_def_cfa_offset 8
----------------
craig.topper wrote:
> I wonder if it would make sense to parallelize this. I think we can shift the v4i64 right by 32, trunc to v4i32 use sitofp to convert that part to double. Multiply that by 2^32 in double. That should all be lossless.
> 
> Then for the bottom 32 bits we can mask with 0xffffffff. OR with the double representation for 2^52. Then subtract 2^52 from it. This should also be lossless.
> 
> Then we just add the two double vectors together which should be the only part that does any rounding.
@scanon or @andrew.w.kaylor should be able to confirm but that sounds alright to me

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Comment at: llvm/test/CodeGen/X86/vec-strict-inttofp-512.ll:434
+; NODQ-32-NEXT:    fstps (%esp)
 ; NODQ-32-NEXT:    wait
 ; NODQ-32-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
----------------
Its a pity this doesn't spill to stack in order, which would've allowed us to load ymm0 with a single vmovups - lack of scalar/vector stack aliasing awareness has come up in some other bugs IIRC

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  https://reviews.llvm.org/D72805/new/

https://reviews.llvm.org/D72805