[PATCH] D72392: [MachineScheduler] Fix the TopDepth/BotHeightReduce latency heuristics

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

The diff in `llvm/test/CodeGen/X86/testb-je-fusion.ll` is:

          movl    %edi, %eax
  -       addl    $-512, %eax             # imm = 0xFE00
          movb    $1, (%rsi)
  +       addl    $-512, %eax             # imm = 0xFE00
          je      .LBB2_2
  ...
          movl    %edi, %eax
  -       decl    %eax
          movb    $1, (%rsi)
  +       decl    %eax
          je      .LBB3_2

The scheduler prefers not to put the addl/decl immediately after the first movl because of the register dependency on eax with latency 1.


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https://reviews.llvm.org/D72392