[PATCH] D68203: Add support for (expressing) vscale.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added a comment.

In D68203#1809517 <https://reviews.llvm.org/D68203#1809517>, @lattner wrote:

> I'm not a comptent reviewer on the details for this whole patch, but the general intrinsic approach LGTM!


Awesome, thanks for having a look!



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Comment at: lib/CodeGen/SelectionDAG/SelectionDAG.cpp:5141
+    }
+    LLVM_FALLTHROUGH;
   case ISD::SRA:
----------------
cameron.mcinally wrote:
> cameron.mcinally wrote:
> > This should probably have a test. Same for ISD::MUL.
> Sorry, just SHL. MUL tests are there...
Good spot, I've replaced some of the `mul` in the test with `shl`.


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Comment at: llvm/include/llvm/CodeGen/ISDOpcodes.h:920
+    /// number of elements within a scalable vector.  IMM is a constant integer
+    /// multiplier that is applied to the runtime value and is usually some
+    /// multiple of MVT.getVectorNumElements().
----------------
SjoerdMeijer wrote:
> Just curious, what do you mean by "usually", i.e. if it is not getVectorNumElements(), what else can it be?
In the context of auto-vectorization, it is often used to increment an iteration counter with the number of elements, e.g. `i = i + vscale x #elts`.

I'll remove the sentence as I agree it adds unnecessary confusion.


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Comment at: llvm/test/CodeGen/AArch64/sve-vscale.ll:20
+; CHECK-NEXT:  ret
+define i32 @rdvl_arg() nounwind {
+  %vscale = call i32 @llvm.vscale(i32 16)
----------------
SjoerdMeijer wrote:
> I don't think I understand this and test case above (haven't looked at the other yet). Essentially I don't understand why we remove the mul with 16.... which we are optimsing away? Is this correct? Where does this constant 16 comes from and what is the meaning of it? It could be I don't understand the RDVL instruction, or the vscale intrinsic definition. Can you explain this?
Here RDVL stores the current vector register size in bytes into `x0` (multiplied by the immediate, in this case 1).
Given that there are `vscale x 16 bytes` in an SVE vector, this instruction folds that `mul 16` away into the instruction, in which it is implicit.



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