[PATCH] D58378: [PowerPC]Leverage the addend in the TOC relocation to do the address calculation

[qshanz via Phabricator via llvm-commits]

steven.zhang updated this revision to Diff 235828.
steven.zhang added a comment.

Still need to investigate why it is 27 bit limit.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58378/new/

https://reviews.llvm.org/D58378

Files:
  llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/test/CodeGen/PowerPC/toc-float.ll

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