[PATCH] D66210: [RISCV] Enable the machine outliner for RISC-V

Lewis Revill via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 16 05:26:46 PST 2019

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lewis-revill added a comment.

I'm doing a final rebase and check on this before merging. I have a failure in the GCC testsuite which I'm triaging.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66210/new/

https://reviews.llvm.org/D66210

Previous message: [PATCH] D71464: [llvm-readelf] - Change letters used for SHF_ARM_PURECODE and SHF_X86_64_LARGE flags.
Next message: [PATCH] D66210: [RISCV] Enable the machine outliner for RISC-V
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