[PATCH] D70800: Fix AArch64 AAPCS frame record chain

[Logan Chien via Phabricator via llvm-commits]

logan marked an inline comment as done.
logan added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp:2289
+      AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+      if (Reg1 == AArch64::FP)
+        AFI->setFrameRecordOffset((RPI.Offset + 1) * Size);
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sdesmalen wrote:
> There is a condition here that is not yet tested. If the frame-record is saved that is both LR and FP, not just FP, so is this case needed?
I think we don't have to check LR here because AAPCS64 guarantees FP and LR will be spilled to consecutive words.  Besides, we only care about the address of the spilled FP.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D70800/new/

https://reviews.llvm.org/D70800