[llvm] cf954e5 - [mips] Add disassembler tests for `octeon` CPU. NFC

[Simon Atanasyan via llvm-commits]

Author: Simon Atanasyan
Date: 2019-11-04T00:42:31+03:00
New Revision: cf954e54f751742ffcbe0816a1d836fec3d9bc09

URL: https://github.com/llvm/llvm-project/commit/cf954e54f751742ffcbe0816a1d836fec3d9bc09
DIFF: https://github.com/llvm/llvm-project/commit/cf954e54f751742ffcbe0816a1d836fec3d9bc09.diff

LOG: [mips] Add disassembler tests for `octeon` CPU. NFC

Added: 
    llvm/test/MC/Disassembler/Mips/octeon/valid-el.txt
    llvm/test/MC/Disassembler/Mips/octeon/valid.txt

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/MC/Disassembler/Mips/octeon/valid-el.txt b/llvm/test/MC/Disassembler/Mips/octeon/valid-el.txt
new file mode 100644
index 000000000000..5a4cf326b177
--- /dev/null
+++ b/llvm/test/MC/Disassembler/Mips/octeon/valid-el.txt
@@ -0,0 +1,31 @@
+# RUN: llvm-mc %s -disassemble -triple=mips64el-unknown-linux -mcpu=octeon \
+# RUN:   | FileCheck %s
+
+0x00 0x00 0x76 0xca # CHECK: bbit0    $19, 22, 4
+0x28 0x48 0xc7 0x70 # CHECK: baddu    $9, $6, $7
+0x00 0x00 0x0a 0xd9 # CHECK: bbit032  $8, 10, 4
+0x00 0x00 0x7f 0xe8 # CHECK: bbit1    $3, 31, 4
+0x00 0x00 0x0a 0xfb # CHECK: bbit132  $24, 10, 4
+0x72 0xec 0x29 0x71 # CHECK: cins     $9, $9, 17, 29
+0xb3 0x44 0x4f 0x70 # CHECK: cins32   $15, $2, 18, 8
+0x03 0x48 0xc7 0x70 # CHECK: dmul     $9, $6, $7
+0x40 0x00 0x22 0x48 # CHECK: dmfc2    $2, 64
+0x47 0x40 0xa2 0x48 # CHECK: dmtc2    $2, 16455
+0x2d 0x48 0xc0 0x70 # CHECK: dpop     $9, $6
+0x7a 0x34 0xef 0x71 # CHECK: exts     $15, $15, 17, 6
+0xbb 0x42 0xa4 0x71 # CHECK: exts32   $4, $13, 10, 8
+0x08 0x00 0xe0 0x71 # CHECK: mtm0     $15
+0x0c 0x00 0x00 0x72 # CHECK: mtm1     $16
+0x0d 0x00 0x20 0x72 # CHECK: mtm2     $17
+0x09 0x00 0x40 0x72 # CHECK: mtp0     $18
+0x0a 0x00 0x60 0x72 # CHECK: mtp1     $19
+0x0b 0x00 0x80 0x72 # CHECK: mtp2     $20
+0x2c 0x48 0xc0 0x70 # CHECK: pop      $9, $6
+0x2a 0xc8 0xf8 0x72 # CHECK: seq      $25, $23, $24
+0xae 0x09 0x10 0x72 # CHECK: seqi     $16, $16, 38
+0x2b 0xb8 0xf4 0x72 # CHECK: sne      $23, $23, $20
+0xef 0xb1 0x04 0x72 # CHECK: snei     $4, $16, -313
+0x8f 0x01 0x00 0x00 # CHECK: sync     6
+0x11 0xa8 0x55 0x71 # CHECK: v3mulu   $21, $10, $21
+0x10 0x18 0x70 0x72 # CHECK: vmm0     $3, $19, $16
+0x0f 0xd8 0x66 0x73 # CHECK: vmulu    $27, $27, $6

diff  --git a/llvm/test/MC/Disassembler/Mips/octeon/valid.txt b/llvm/test/MC/Disassembler/Mips/octeon/valid.txt
new file mode 100644
index 000000000000..03484c1340da
--- /dev/null
+++ b/llvm/test/MC/Disassembler/Mips/octeon/valid.txt
@@ -0,0 +1,31 @@
+# RUN: llvm-mc %s -disassemble -triple=mips64-unknown-linux -mcpu=octeon \
+# RUN:   | FileCheck %s
+
+0xca 0x76 0x00 0x00 # CHECK: bbit0    $19, 22, 4
+0x70 0xc7 0x48 0x28 # CHECK: baddu    $9, $6, $7
+0xd9 0x0a 0x00 0x00 # CHECK: bbit032  $8, 10, 4
+0xe8 0x7f 0x00 0x00 # CHECK: bbit1    $3, 31, 4
+0xfb 0x0a 0x00 0x00 # CHECK: bbit132  $24, 10, 4
+0x71 0x29 0xec 0x72 # CHECK: cins     $9, $9, 17, 29
+0x70 0x4f 0x44 0xb3 # CHECK: cins32   $15, $2, 18, 8
+0x70 0xc7 0x48 0x03 # CHECK: dmul     $9, $6, $7
+0x48 0x22 0x00 0x40 # CHECK: dmfc2    $2, 64
+0x48 0xa2 0x40 0x47 # CHECK: dmtc2    $2, 16455
+0x70 0xc0 0x48 0x2d # CHECK: dpop     $9, $6
+0x71 0xef 0x34 0x7a # CHECK: exts     $15, $15, 17, 6
+0x71 0xa4 0x42 0xbb # CHECK: exts32   $4, $13, 10, 8
+0x71 0xe0 0x00 0x08 # CHECK: mtm0     $15
+0x72 0x00 0x00 0x0c # CHECK: mtm1     $16
+0x72 0x20 0x00 0x0d # CHECK: mtm2     $17
+0x72 0x40 0x00 0x09 # CHECK: mtp0     $18
+0x72 0x60 0x00 0x0a # CHECK: mtp1     $19
+0x72 0x80 0x00 0x0b # CHECK: mtp2     $20
+0x70 0xc0 0x48 0x2c # CHECK: pop      $9, $6
+0x72 0xf8 0xc8 0x2a # CHECK: seq      $25, $23, $24
+0x72 0x10 0x09 0xae # CHECK: seqi     $16, $16, 38
+0x72 0xf4 0xb8 0x2b # CHECK: sne      $23, $23, $20
+0x72 0x04 0xb1 0xef # CHECK: snei     $4, $16, -313
+0x00 0x00 0x01 0x8f # CHECK: sync     6
+0x71 0x55 0xa8 0x11 # CHECK: v3mulu   $21, $10, $21
+0x72 0x70 0x18 0x10 # CHECK: vmm0     $3, $19, $16
+0x73 0x66 0xd8 0x0f # CHECK: vmulu    $27, $27, $6