[llvm] 5257a95 - [mips] Add disassembler tests for `sigrie` instruction. NFC

[Simon Atanasyan via llvm-commits]

Author: Simon Atanasyan
Date: 2019-11-04T00:42:31+03:00
New Revision: 5257a95426770540f54305b8eb369152d2d0239f

URL: https://github.com/llvm/llvm-project/commit/5257a95426770540f54305b8eb369152d2d0239f
DIFF: https://github.com/llvm/llvm-project/commit/5257a95426770540f54305b8eb369152d2d0239f.diff

LOG: [mips] Add disassembler tests for `sigrie` instruction. NFC

Added: 
    

Modified: 
    llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
    llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
    llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
    llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt

Removed: 
    


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diff  --git a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
index 52fca881b073..1a73178a1f6a 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
@@ -171,3 +171,4 @@
 0x00 0x01 0x05 0xd8 # CHECK: jic $5, 256
 0x25 0x04 0xa1 0x7c # CHECK: cache 1, 8($5)
 0x35 0x04 0xa1 0x7c # CHECK: pref 1, 8($5
+0x05 0x00 0x17 0x04 # CHECK: sigrie 5

diff  --git a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
index 30cb16d9e6c2..53ea0258e1c4 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
@@ -198,3 +198,4 @@
 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
 0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72260
 0xf8 0x5f 0xff 0xfa # CHECK: bnezc $2, -20
+0x04 0x17 0x00 0x05 # CHECK: sigrie 5

diff  --git a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
index cc23563dbe9c..9aeea45472ae 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
@@ -197,3 +197,4 @@
 0x33 0xfe 0x1d 0x02 # CHECK: tltu $16, $sp, 1016
 0x36 0x00 0xd1 0x00 # CHECK: tne $6, $17
 0x76 0xdd 0xe8 0x00 # CHECK: tne $7, $8, 885
+0x05 0x00 0x17 0x04 # CHECK: sigrie 5

diff  --git a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
index 6524c6aab019..32b91c6c6842 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
@@ -224,3 +224,4 @@
 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
 0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72260
 0xf8 0x5f 0xff 0xfa # CHECK: bnezc $2, -20
+0x04 0x17 0x00 0x05 # CHECK: sigrie 5