[PATCH] D68828: [AMDGPU] Allow DPP combiner to work with REG_SEQUENCE

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 11 16:14:52 PDT 2019


rampitec marked an inline comment as done.
rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp:539-543
+      for (unsigned I = 1, E = S->getNumOperands(); I < E; I += 2) {
+        MachineOperand &Op = S->getOperand(I);
+        if (!MRI->getVRegDef(Op.getReg()))
+          Op.setIsUndef(true);
+      }
----------------
arsenm wrote:
> This seems like a questionable way to preserve undefs. Can you avoid doing this by checking getVRegDef?
What's wrong with it? A register either has def or not. The other way would be to keep all reg_sequences along with the info about all subregs, if they were combined or not.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68828/new/

https://reviews.llvm.org/D68828





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