[PATCH] D68828: [AMDGPU] Allow DPP combiner to work with REG_SEQUENCE

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp:539-543
+      for (unsigned I = 1, E = S->getNumOperands(); I < E; I += 2) {
+        MachineOperand &Op = S->getOperand(I);
+        if (!MRI->getVRegDef(Op.getReg()))
+          Op.setIsUndef(true);
+      }
----------------
This seems like a questionable way to preserve undefs. Can you avoid doing this by checking getVRegDef?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68828/new/

https://reviews.llvm.org/D68828