[llvm] r370388 - GlobalISel: Add known bits to InstructionSelector
Galina Kistanova via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 30 10:53:11 PDT 2019
Hello Matt,
At least one more builder is affected:
lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast
Please have a look ASAP?
. . .
********************
Failing Tests (118):
LLVM :: CodeGen/X86/GlobalISel/GV.ll
LLVM :: CodeGen/X86/GlobalISel/add-ext.ll
LLVM :: CodeGen/X86/GlobalISel/add-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/add-vec.ll
LLVM :: CodeGen/X86/GlobalISel/and-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/ashr-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir
LLVM :: CodeGen/X86/GlobalISel/binop.ll
LLVM :: CodeGen/X86/GlobalISel/br.ll
LLVM :: CodeGen/X86/GlobalISel/brcond.ll
LLVM :: CodeGen/X86/GlobalISel/callingconv.ll
LLVM :: CodeGen/X86/GlobalISel/cmp.ll
LLVM :: CodeGen/X86/GlobalISel/constant.ll
LLVM :: CodeGen/X86/GlobalISel/ext-x86-64.ll
LLVM :: CodeGen/X86/GlobalISel/ext.ll
LLVM :: CodeGen/X86/GlobalISel/fadd-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/fconstant.ll
LLVM :: CodeGen/X86/GlobalISel/fdiv-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/fmul-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/fpext-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/frameIndex.ll
LLVM :: CodeGen/X86/GlobalISel/fsub-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/gep.ll
LLVM :: CodeGen/X86/GlobalISel/inttoptr.ll
LLVM :: CodeGen/X86/GlobalISel/lshr-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/memop-scalar-x32.ll
LLVM :: CodeGen/X86/GlobalISel/memop-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/memop-vec.ll
LLVM :: CodeGen/X86/GlobalISel/mul-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/mul-vec.ll
LLVM :: CodeGen/X86/GlobalISel/or-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/phi.ll
LLVM :: CodeGen/X86/GlobalISel/ptrtoint.ll
LLVM :: CodeGen/X86/GlobalISel/select-GV-32.mir
LLVM :: CodeGen/X86/GlobalISel/select-GV-64.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-v128.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-v256.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-v512.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-x32.mir
LLVM :: CodeGen/X86/GlobalISel/select-add.mir
LLVM :: CodeGen/X86/GlobalISel/select-and-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-ashr-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-blsi.mir
LLVM :: CodeGen/X86/GlobalISel/select-blsr.mir
LLVM :: CodeGen/X86/GlobalISel/select-br.mir
LLVM :: CodeGen/X86/GlobalISel/select-brcond.mir
LLVM :: CodeGen/X86/GlobalISel/select-cmp.mir
LLVM :: CodeGen/X86/GlobalISel/select-constant.mir
LLVM :: CodeGen/X86/GlobalISel/select-copy.mir
LLVM :: CodeGen/X86/GlobalISel/select-ext-x86-64.mir
LLVM :: CodeGen/X86/GlobalISel/select-ext.mir
LLVM :: CodeGen/X86/GlobalISel/select-extract-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-extract-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-fadd-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fconstant.mir
LLVM :: CodeGen/X86/GlobalISel/select-fdiv-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fmul-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fpext-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fptrunc-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fsub-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-gep.mir
LLVM :: CodeGen/X86/GlobalISel/select-inc.mir
LLVM :: CodeGen/X86/GlobalISel/select-insert-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-insert-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir
LLVM :: CodeGen/X86/GlobalISel/select-leaf-constant.mir
LLVM :: CodeGen/X86/GlobalISel/select-lshr-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-scalar-unordered.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-scalar-x32.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-v128.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-v256.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-v512.mir
LLVM :: CodeGen/X86/GlobalISel/select-merge-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-merge-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-mul-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-mul-vec.mir
LLVM :: CodeGen/X86/GlobalISel/select-or-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-phi.mir
LLVM :: CodeGen/X86/GlobalISel/select-shl-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub-v128.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub-v256.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub-v512.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub.mir
LLVM :: CodeGen/X86/GlobalISel/select-trunc.mir
LLVM :: CodeGen/X86/GlobalISel/select-undef.mir
LLVM :: CodeGen/X86/GlobalISel/select-unmerge-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-unmerge-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-xor-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/shl-scalar-widening.ll
LLVM :: CodeGen/X86/GlobalISel/shl-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/sub-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/sub-vec.ll
LLVM :: CodeGen/X86/GlobalISel/trunc.ll
LLVM :: CodeGen/X86/GlobalISel/undef.ll
LLVM :: CodeGen/X86/GlobalISel/x32-select-frameIndex.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-frameIndex.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-sdiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-srem.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-trap.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-udiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-urem.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-fallback.ll
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-fptosi.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-frameIndex.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-ptrtoint.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-sdiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-sitofp.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-srem.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-udiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-urem.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-zext.mir
LLVM :: CodeGen/X86/GlobalISel/xor-scalar.ll
LLVM :: CodeGen/X86/is-constant.ll
Thanks
Galina
On Fri, Aug 30, 2019 at 12:51 AM via llvm-commits <
llvm-commits at lists.llvm.org> wrote:
> Hi Matt,
>
> This change is causing 118 test failures on the PS4 linux bot. Here is a
> sample failure:
>
>
> http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/54056/steps/test/logs/stdio
>
> FAIL: LLVM :: CodeGen/X86/GlobalISel/add-ext.ll (32869 of 52285)
> ******************** TEST 'LLVM :: CodeGen/X86/GlobalISel/add-ext.ll'
> FAILED ********************
> Script:
> --
> : 'RUN: at line 2';
> /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc
> <
> /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/test/CodeGen/X86/GlobalISel/add-ext.ll
> -mtriple=x86_64-unknown-unknown -global-isel |
> /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/FileCheck
> /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/test/CodeGen/X86/GlobalISel/add-ext.ll
> --
> Exit Code: 2
>
> Command Output (stderr):
> --
> Pass 'InstructionSelect' is not initialized.
> Verify if there is a pass dependency cycle.
> Required Passes:
> Target Pass Configuration
> llc:
> /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/lib/IR/LegacyPassManager.cpp:753:
> void llvm::PMTopLevelManager::schedulePass(llvm::Pass *): Assertion `PI &&
> "Expected required passes to be initialized"' failed.
> Stack dump:
> 0. Program arguments:
> /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc
> -mtriple=x86_64-unknown-unknown -global-isel
> #0 0x0000000001631384 PrintStackTraceSignalHandler(void*)
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x1631384)
> #1 0x000000000162f09e llvm::sys::RunSignalHandlers()
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x162f09e)
> #2 0x0000000001631798 SignalHandler(int)
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x1631798)
> #3 0x00007fb15e272890 __restore_rt
> (/lib/x86_64-linux-gnu/libpthread.so.0+0x12890)
> #4 0x00007fb15cf38e97 raise (/lib/x86_64-linux-gnu/libc.so.6+0x3ee97)
> #5 0x00007fb15cf3a801 abort (/lib/x86_64-linux-gnu/libc.so.6+0x40801)
> #6 0x00007fb15cf2a39a (/lib/x86_64-linux-gnu/libc.so.6+0x3039a)
> #7 0x00007fb15cf2a412 (/lib/x86_64-linux-gnu/libc.so.6+0x30412)
> #8 0x0000000000fbbec5 llvm::PMTopLevelManager::schedulePass(llvm::Pass*)
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xfbbec5)
> #9 0x0000000000df7742 llvm::TargetPassConfig::addPass(llvm::Pass*, bool,
> bool)
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xdf7742)
> #10 0x00000000006686d1 (anonymous
> namespace)::X86PassConfig::addGlobalInstructionSelect()
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x6686d1)
> #11 0x0000000000df826c llvm::TargetPassConfig::addCoreISelPasses()
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xdf826c)
> #12 0x0000000000df8446 llvm::TargetPassConfig::addISelPasses()
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xdf8446)
> #13 0x0000000000bced1a
> llvm::LLVMTargetMachine::addPassesToEmitFile(llvm::legacy::PassManagerBase&,
> llvm::raw_pwrite_stream&, llvm::raw_pwrite_stream*,
> llvm::TargetMachine::CodeGenFileType, bool, llvm::MachineModuleInfo*)
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xbced1a)
> #14 0x00000000006318a7 compileModule(char**, llvm::LLVMContext&)
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x6318a7)
> #15 0x000000000062f6cd main
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x62f6cd)
> #16 0x00007fb15cf1bb97 __libc_start_main
> (/lib/x86_64-linux-gnu/libc.so.6+0x21b97)
> #17 0x000000000062d46a _start
> (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x62d46a)
> FileCheck error: '-' is empty.
> FileCheck command line:
> /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/FileCheck
> /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/test/CodeGen/X86/GlobalISel/add-ext.ll
>
> Can you take a look?
>
> Douglas Yung
>
> -----Original Message-----
> From: llvm-commits <llvm-commits-bounces at lists.llvm.org> On Behalf Of
> Matt Arsenault via llvm-commits
> Sent: Thursday, August 29, 2019 10:25
> To: llvm-commits at lists.llvm.org
> Subject: [llvm] r370388 - GlobalISel: Add known bits to InstructionSelector
>
> Author: arsenm
> Date: Thu Aug 29 10:24:32 2019
> New Revision: 370388
>
> URL: http://llvm.org/viewvc/llvm-project?rev=370388&view=rev
> Log:
> GlobalISel: Add known bits to InstructionSelector
>
> AMDGPU uses this for some addressing mode selection patterns. The analysis
> run itself doesn't do anything so it seems easier to just always require
> this than adding a way to opt in.
>
> Modified:
> llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
> llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp
> llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
> llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
> llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll
>
> Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h?rev=370388&r1=370387&r2=370388&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
> (original)
> +++ llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h Thu
> +++ Aug 29 10:24:32 2019
> @@ -31,6 +31,7 @@ namespace llvm {
>
> class APInt;
> class APFloat;
> +class GISelKnownBits;
> class MachineInstr;
> class MachineInstrBuilder;
> class MachineFunction;
> @@ -381,11 +382,15 @@ public:
> virtual bool select(MachineInstr &I) = 0;
>
> CodeGenCoverage *CoverageInfo = nullptr;
> + GISelKnownBits *KnownBits = nullptr;
> MachineFunction *MF = nullptr;
>
> /// Setup per-MF selector state.
> - virtual void setupMF(MachineFunction &mf, CodeGenCoverage &covinfo) {
> + virtual void setupMF(MachineFunction &mf,
> + GISelKnownBits &KB,
> + CodeGenCoverage &covinfo) {
> CoverageInfo = &covinfo;
> + KnownBits = &KB;
> MF = &mf;
> }
>
>
> Modified: llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp?rev=370388&r1=370387&r2=370388&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp (original)
> +++ llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp Thu Aug 29
> +++ 10:24:32 2019
> @@ -12,6 +12,7 @@
> #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
> #include "llvm/ADT/PostOrderIterator.h"
> #include "llvm/ADT/Twine.h"
> +#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
> #include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
> #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
> #include "llvm/CodeGen/GlobalISel/Utils.h"
> @@ -53,6 +54,8 @@ InstructionSelect::InstructionSelect() :
>
> void InstructionSelect::getAnalysisUsage(AnalysisUsage &AU) const {
> AU.addRequired<TargetPassConfig>();
> + AU.addRequired<GISelKnownBitsAnalysis>();
> + AU.addPreserved<GISelKnownBitsAnalysis>();
> getSelectionDAGFallbackAnalysisUsage(AU);
> MachineFunctionPass::getAnalysisUsage(AU);
> }
> @@ -64,12 +67,13 @@ bool InstructionSelect::runOnMachineFunc
> return false;
>
> LLVM_DEBUG(dbgs() << "Selecting function: " << MF.getName() << '\n');
> + GISelKnownBits &KB = getAnalysis<GISelKnownBitsAnalysis>().get(MF);
>
> const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
> InstructionSelector *ISel = MF.getSubtarget().getInstructionSelector();
> CodeGenCoverage CoverageInfo;
> assert(ISel && "Cannot work without InstructionSelector");
> - ISel->setupMF(MF, CoverageInfo);
> + ISel->setupMF(MF, KB, CoverageInfo);
>
> // An optimization remark emitter. Used to report failures.
> MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=370388&r1=370387&r2=370388&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp Thu Aug
> +++ 29 10:24:32 2019
> @@ -54,8 +54,9 @@ public:
> bool select(MachineInstr &I) override;
> static const char *getName() { return DEBUG_TYPE; }
>
> - void setupMF(MachineFunction &MF, CodeGenCoverage &CoverageInfo)
> override {
> - InstructionSelector::setupMF(MF, CoverageInfo);
> + void setupMF(MachineFunction &MF, GISelKnownBits &KB,
> + CodeGenCoverage &CoverageInfo) override {
> + InstructionSelector::setupMF(MF, KB, CoverageInfo);
>
> // hasFnAttribute() is expensive to call on every BRCOND selection, so
> // cache it here for each run of the selector.
>
> Modified:
> llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll?rev=370388&r1=370387&r2=370388&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
> (original)
> +++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.
> +++ ll Thu Aug 29 10:24:32 2019
> @@ -53,6 +53,7 @@
> ; VERIFY-NEXT: Verify generated machine code
> ; ENABLED-O0-NEXT: Localizer
> ; VERIFY-O0-NEXT: Verify generated machine code
> +; ENABLED-NEXT: Analysis for ComputingKnownBits
> ; ENABLED-NEXT: InstructionSelect
> ; VERIFY-NEXT: Verify generated machine code
> ; ENABLED-NEXT: ResetMachineFunction
>
> Modified: llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll?rev=370388&r1=370387&r2=370388&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll Thu Aug 29 10:24:32
> +++ 2019
> @@ -41,6 +41,7 @@
> ; CHECK-NEXT: Legalizer
> ; CHECK-NEXT: RegBankSelect
> ; CHECK-NEXT: Localizer
> +; CHECK-NEXT: Analysis for ComputingKnownBits
> ; CHECK-NEXT: InstructionSelect
> ; CHECK-NEXT: ResetMachineFunction
> ; CHECK-NEXT: AArch64 Instruction Selection
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190830/0e7e6a34/attachment.html>
More information about the llvm-commits
mailing list