<div dir="ltr"><div><div><div>Hello Matt,<br><br></div>At least one more builder is affected:<br><a href="http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast">lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast</a></div><div><br></div><div>
Please have a look ASAP?</div><div><br></div><div>. . . <br></div><div>
<pre><span class="gmail-stdout">********************
Failing Tests (118):
LLVM :: CodeGen/X86/GlobalISel/GV.ll
LLVM :: CodeGen/X86/GlobalISel/add-ext.ll
LLVM :: CodeGen/X86/GlobalISel/add-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/add-vec.ll
LLVM :: CodeGen/X86/GlobalISel/and-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/ashr-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir
LLVM :: CodeGen/X86/GlobalISel/binop.ll
LLVM :: CodeGen/X86/GlobalISel/br.ll
LLVM :: CodeGen/X86/GlobalISel/brcond.ll
LLVM :: CodeGen/X86/GlobalISel/callingconv.ll
LLVM :: CodeGen/X86/GlobalISel/cmp.ll
LLVM :: CodeGen/X86/GlobalISel/constant.ll
LLVM :: CodeGen/X86/GlobalISel/ext-x86-64.ll
LLVM :: CodeGen/X86/GlobalISel/ext.ll
LLVM :: CodeGen/X86/GlobalISel/fadd-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/fconstant.ll
LLVM :: CodeGen/X86/GlobalISel/fdiv-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/fmul-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/fpext-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/frameIndex.ll
LLVM :: CodeGen/X86/GlobalISel/fsub-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/gep.ll
LLVM :: CodeGen/X86/GlobalISel/inttoptr.ll
LLVM :: CodeGen/X86/GlobalISel/lshr-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/memop-scalar-x32.ll
LLVM :: CodeGen/X86/GlobalISel/memop-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/memop-vec.ll
LLVM :: CodeGen/X86/GlobalISel/mul-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/mul-vec.ll
LLVM :: CodeGen/X86/GlobalISel/or-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/phi.ll
LLVM :: CodeGen/X86/GlobalISel/ptrtoint.ll
LLVM :: CodeGen/X86/GlobalISel/select-GV-32.mir
LLVM :: CodeGen/X86/GlobalISel/select-GV-64.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-v128.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-v256.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-v512.mir
LLVM :: CodeGen/X86/GlobalISel/select-add-x32.mir
LLVM :: CodeGen/X86/GlobalISel/select-add.mir
LLVM :: CodeGen/X86/GlobalISel/select-and-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-ashr-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-blsi.mir
LLVM :: CodeGen/X86/GlobalISel/select-blsr.mir
LLVM :: CodeGen/X86/GlobalISel/select-br.mir
LLVM :: CodeGen/X86/GlobalISel/select-brcond.mir
LLVM :: CodeGen/X86/GlobalISel/select-cmp.mir
LLVM :: CodeGen/X86/GlobalISel/select-constant.mir
LLVM :: CodeGen/X86/GlobalISel/select-copy.mir
LLVM :: CodeGen/X86/GlobalISel/select-ext-x86-64.mir
LLVM :: CodeGen/X86/GlobalISel/select-ext.mir
LLVM :: CodeGen/X86/GlobalISel/select-extract-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-extract-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-fadd-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fconstant.mir
LLVM :: CodeGen/X86/GlobalISel/select-fdiv-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fmul-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fpext-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fptrunc-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-fsub-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-gep.mir
LLVM :: CodeGen/X86/GlobalISel/select-inc.mir
LLVM :: CodeGen/X86/GlobalISel/select-insert-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-insert-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir
LLVM :: CodeGen/X86/GlobalISel/select-leaf-constant.mir
LLVM :: CodeGen/X86/GlobalISel/select-lshr-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-scalar-unordered.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-scalar-x32.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-v128.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-v256.mir
LLVM :: CodeGen/X86/GlobalISel/select-memop-v512.mir
LLVM :: CodeGen/X86/GlobalISel/select-merge-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-merge-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-mul-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-mul-vec.mir
LLVM :: CodeGen/X86/GlobalISel/select-or-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-phi.mir
LLVM :: CodeGen/X86/GlobalISel/select-shl-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub-v128.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub-v256.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub-v512.mir
LLVM :: CodeGen/X86/GlobalISel/select-sub.mir
LLVM :: CodeGen/X86/GlobalISel/select-trunc.mir
LLVM :: CodeGen/X86/GlobalISel/select-undef.mir
LLVM :: CodeGen/X86/GlobalISel/select-unmerge-vec256.mir
LLVM :: CodeGen/X86/GlobalISel/select-unmerge-vec512.mir
LLVM :: CodeGen/X86/GlobalISel/select-xor-scalar.mir
LLVM :: CodeGen/X86/GlobalISel/shl-scalar-widening.ll
LLVM :: CodeGen/X86/GlobalISel/shl-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/sub-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/sub-vec.ll
LLVM :: CodeGen/X86/GlobalISel/trunc.ll
LLVM :: CodeGen/X86/GlobalISel/undef.ll
LLVM :: CodeGen/X86/GlobalISel/x32-select-frameIndex.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-frameIndex.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-sdiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-srem.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-trap.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-udiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86-select-urem.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-fallback.ll
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-fptosi.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-frameIndex.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-ptrtoint.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-sdiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-sitofp.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-srem.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-udiv.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-urem.mir
LLVM :: CodeGen/X86/GlobalISel/x86_64-select-zext.mir
LLVM :: CodeGen/X86/GlobalISel/xor-scalar.ll
LLVM :: CodeGen/X86/is-constant.ll
</span></pre>
</div></div><div><br></div><div>Thanks</div><div><br></div><div>Galina<br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Aug 30, 2019 at 12:51 AM via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Hi Matt,<br>
<br>
This change is causing 118 test failures on the PS4 linux bot. Here is a sample failure:<br>
<br>
<a href="http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/54056/steps/test/logs/stdio" rel="noreferrer" target="_blank">http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/54056/steps/test/logs/stdio</a><br>
<br>
FAIL: LLVM :: CodeGen/X86/GlobalISel/add-ext.ll (32869 of 52285)<br>
******************** TEST 'LLVM :: CodeGen/X86/GlobalISel/add-ext.ll' FAILED ********************<br>
Script:<br>
--<br>
: 'RUN: at line 2'; /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc < /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/test/CodeGen/X86/GlobalISel/add-ext.ll -mtriple=x86_64-unknown-unknown -global-isel | /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/FileCheck /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/test/CodeGen/X86/GlobalISel/add-ext.ll<br>
--<br>
Exit Code: 2<br>
<br>
Command Output (stderr):<br>
--<br>
Pass 'InstructionSelect' is not initialized.<br>
Verify if there is a pass dependency cycle.<br>
Required Passes:<br>
Target Pass Configuration<br>
llc: /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/lib/IR/LegacyPassManager.cpp:753: void llvm::PMTopLevelManager::schedulePass(llvm::Pass *): Assertion `PI && "Expected required passes to be initialized"' failed.<br>
Stack dump:<br>
0. Program arguments: /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc -mtriple=x86_64-unknown-unknown -global-isel <br>
#0 0x0000000001631384 PrintStackTraceSignalHandler(void*) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x1631384)<br>
#1 0x000000000162f09e llvm::sys::RunSignalHandlers() (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x162f09e)<br>
#2 0x0000000001631798 SignalHandler(int) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x1631798)<br>
#3 0x00007fb15e272890 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x12890)<br>
#4 0x00007fb15cf38e97 raise (/lib/x86_64-linux-gnu/libc.so.6+0x3ee97)<br>
#5 0x00007fb15cf3a801 abort (/lib/x86_64-linux-gnu/libc.so.6+0x40801)<br>
#6 0x00007fb15cf2a39a (/lib/x86_64-linux-gnu/libc.so.6+0x3039a)<br>
#7 0x00007fb15cf2a412 (/lib/x86_64-linux-gnu/libc.so.6+0x30412)<br>
#8 0x0000000000fbbec5 llvm::PMTopLevelManager::schedulePass(llvm::Pass*) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xfbbec5)<br>
#9 0x0000000000df7742 llvm::TargetPassConfig::addPass(llvm::Pass*, bool, bool) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xdf7742)<br>
#10 0x00000000006686d1 (anonymous namespace)::X86PassConfig::addGlobalInstructionSelect() (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x6686d1)<br>
#11 0x0000000000df826c llvm::TargetPassConfig::addCoreISelPasses() (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xdf826c)<br>
#12 0x0000000000df8446 llvm::TargetPassConfig::addISelPasses() (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xdf8446)<br>
#13 0x0000000000bced1a llvm::LLVMTargetMachine::addPassesToEmitFile(llvm::legacy::PassManagerBase&, llvm::raw_pwrite_stream&, llvm::raw_pwrite_stream*, llvm::TargetMachine::CodeGenFileType, bool, llvm::MachineModuleInfo*) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0xbced1a)<br>
#14 0x00000000006318a7 compileModule(char**, llvm::LLVMContext&) (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x6318a7)<br>
#15 0x000000000062f6cd main (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x62f6cd)<br>
#16 0x00007fb15cf1bb97 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x21b97)<br>
#17 0x000000000062d46a _start (/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/llc+0x62d46a)<br>
FileCheck error: '-' is empty.<br>
FileCheck command line: /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.obj/bin/FileCheck /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/test/CodeGen/X86/GlobalISel/add-ext.ll<br>
<br>
Can you take a look?<br>
<br>
Douglas Yung<br>
<br>
-----Original Message-----<br>
From: llvm-commits <<a href="mailto:llvm-commits-bounces@lists.llvm.org" target="_blank">llvm-commits-bounces@lists.llvm.org</a>> On Behalf Of Matt Arsenault via llvm-commits<br>
Sent: Thursday, August 29, 2019 10:25<br>
To: <a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br>
Subject: [llvm] r370388 - GlobalISel: Add known bits to InstructionSelector<br>
<br>
Author: arsenm<br>
Date: Thu Aug 29 10:24:32 2019<br>
New Revision: 370388<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=370388&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=370388&view=rev</a><br>
Log:<br>
GlobalISel: Add known bits to InstructionSelector<br>
<br>
AMDGPU uses this for some addressing mode selection patterns. The analysis run itself doesn't do anything so it seems easier to just always require this than adding a way to opt in.<br>
<br>
Modified:<br>
llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h<br>
llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp<br>
llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp<br>
llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll<br>
llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h?rev=370388&r1=370387&r2=370388&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h?rev=370388&r1=370387&r2=370388&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h Thu <br>
+++ Aug 29 10:24:32 2019<br>
@@ -31,6 +31,7 @@ namespace llvm {<br>
<br>
class APInt;<br>
class APFloat;<br>
+class GISelKnownBits;<br>
class MachineInstr;<br>
class MachineInstrBuilder;<br>
class MachineFunction;<br>
@@ -381,11 +382,15 @@ public:<br>
virtual bool select(MachineInstr &I) = 0;<br>
<br>
CodeGenCoverage *CoverageInfo = nullptr;<br>
+ GISelKnownBits *KnownBits = nullptr;<br>
MachineFunction *MF = nullptr;<br>
<br>
/// Setup per-MF selector state.<br>
- virtual void setupMF(MachineFunction &mf, CodeGenCoverage &covinfo) {<br>
+ virtual void setupMF(MachineFunction &mf,<br>
+ GISelKnownBits &KB,<br>
+ CodeGenCoverage &covinfo) {<br>
CoverageInfo = &covinfo;<br>
+ KnownBits = &KB;<br>
MF = &mf;<br>
}<br>
<br>
<br>
Modified: llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp?rev=370388&r1=370387&r2=370388&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp?rev=370388&r1=370387&r2=370388&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp Thu Aug 29 <br>
+++ 10:24:32 2019<br>
@@ -12,6 +12,7 @@<br>
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"<br>
#include "llvm/ADT/PostOrderIterator.h"<br>
#include "llvm/ADT/Twine.h"<br>
+#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"<br>
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"<br>
#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"<br>
#include "llvm/CodeGen/GlobalISel/Utils.h"<br>
@@ -53,6 +54,8 @@ InstructionSelect::InstructionSelect() :<br>
<br>
void InstructionSelect::getAnalysisUsage(AnalysisUsage &AU) const {<br>
AU.addRequired<TargetPassConfig>();<br>
+ AU.addRequired<GISelKnownBitsAnalysis>();<br>
+ AU.addPreserved<GISelKnownBitsAnalysis>();<br>
getSelectionDAGFallbackAnalysisUsage(AU);<br>
MachineFunctionPass::getAnalysisUsage(AU);<br>
}<br>
@@ -64,12 +67,13 @@ bool InstructionSelect::runOnMachineFunc<br>
return false;<br>
<br>
LLVM_DEBUG(dbgs() << "Selecting function: " << MF.getName() << '\n');<br>
+ GISelKnownBits &KB = getAnalysis<GISelKnownBitsAnalysis>().get(MF);<br>
<br>
const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();<br>
InstructionSelector *ISel = MF.getSubtarget().getInstructionSelector();<br>
CodeGenCoverage CoverageInfo;<br>
assert(ISel && "Cannot work without InstructionSelector");<br>
- ISel->setupMF(MF, CoverageInfo);<br>
+ ISel->setupMF(MF, KB, CoverageInfo);<br>
<br>
// An optimization remark emitter. Used to report failures.<br>
MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=370388&r1=370387&r2=370388&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=370388&r1=370387&r2=370388&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp Thu Aug <br>
+++ 29 10:24:32 2019<br>
@@ -54,8 +54,9 @@ public:<br>
bool select(MachineInstr &I) override;<br>
static const char *getName() { return DEBUG_TYPE; }<br>
<br>
- void setupMF(MachineFunction &MF, CodeGenCoverage &CoverageInfo) override {<br>
- InstructionSelector::setupMF(MF, CoverageInfo);<br>
+ void setupMF(MachineFunction &MF, GISelKnownBits &KB,<br>
+ CodeGenCoverage &CoverageInfo) override {<br>
+ InstructionSelector::setupMF(MF, KB, CoverageInfo);<br>
<br>
// hasFnAttribute() is expensive to call on every BRCOND selection, so<br>
// cache it here for each run of the selector.<br>
<br>
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll?rev=370388&r1=370387&r2=370388&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll?rev=370388&r1=370387&r2=370388&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.<br>
+++ ll Thu Aug 29 10:24:32 2019<br>
@@ -53,6 +53,7 @@<br>
; VERIFY-NEXT: Verify generated machine code<br>
; ENABLED-O0-NEXT: Localizer<br>
; VERIFY-O0-NEXT: Verify generated machine code<br>
+; ENABLED-NEXT: Analysis for ComputingKnownBits<br>
; ENABLED-NEXT: InstructionSelect<br>
; VERIFY-NEXT: Verify generated machine code<br>
; ENABLED-NEXT: ResetMachineFunction<br>
<br>
Modified: llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll?rev=370388&r1=370387&r2=370388&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll?rev=370388&r1=370387&r2=370388&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll Thu Aug 29 10:24:32 <br>
+++ 2019<br>
@@ -41,6 +41,7 @@<br>
; CHECK-NEXT: Legalizer<br>
; CHECK-NEXT: RegBankSelect<br>
; CHECK-NEXT: Localizer<br>
+; CHECK-NEXT: Analysis for ComputingKnownBits<br>
; CHECK-NEXT: InstructionSelect<br>
; CHECK-NEXT: ResetMachineFunction<br>
; CHECK-NEXT: AArch64 Instruction Selection<br>
<br>
<br>
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