[llvm] r367100 - [X86][SSE] Replace PMULDQ GetDemandedBits combine with SimplifyMultipleUseDemandedBits handler.

Vlad Tsyrklevich via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 26 11:22:58 PDT 2019


I've reverted this change as it seemed to be responsible for test failures
like this
<http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/33847>
after
Nico's revert of r367091 landed.

On Fri, Jul 26, 2019 at 4:09 AM Simon Pilgrim via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: rksimon
> Date: Fri Jul 26 04:10:20 2019
> New Revision: 367100
>
> URL: http://llvm.org/viewvc/llvm-project?rev=367100&view=rev
> Log:
> [X86][SSE] Replace PMULDQ GetDemandedBits combine with
> SimplifyMultipleUseDemandedBits handler.
>
> This removes a GetDemandedBits user and allows us to benefit from the
> DemandedElts propagated through SimplifyDemandedBits.
>
> Modified:
>     llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>     llvm/trunk/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll
>     llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll
>     llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=367100&r1=367099&r2=367100&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Jul 26 04:10:20 2019
> @@ -34381,6 +34381,18 @@ bool X86TargetLowering::SimplifyDemanded
>      if (SimplifyDemandedBits(RHS, DemandedMask, OriginalDemandedElts,
> KnownOp,
>                               TLO, Depth + 1))
>        return true;
> +
> +    // Aggressively peek through ops to get at the demanded low bits.
> +    SDValue DemandedLHS = SimplifyMultipleUseDemandedBits(
> +        LHS, DemandedMask, OriginalDemandedElts, TLO.DAG, Depth + 1);
> +    SDValue DemandedRHS = SimplifyMultipleUseDemandedBits(
> +        RHS, DemandedMask, OriginalDemandedElts, TLO.DAG, Depth + 1);
> +    if (DemandedLHS || DemandedRHS) {
> +      DemandedLHS = DemandedLHS ? DemandedLHS : LHS;
> +      DemandedRHS = DemandedRHS ? DemandedRHS : RHS;
> +      return TLO.CombineTo(
> +          Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, DemandedLHS,
> DemandedRHS));
> +    }
>      break;
>    }
>    case X86ISD::VSHLI: {
> @@ -44220,15 +44232,6 @@ static SDValue combinePMULDQ(SDNode *N,
>    if (ISD::isBuildVectorAllZeros(RHS.getNode()))
>      return RHS;
>
> -  // Aggressively peek through ops to get at the demanded low bits.
> -  APInt DemandedMask = APInt::getLowBitsSet(64, 32);
> -  SDValue DemandedLHS = DAG.GetDemandedBits(LHS, DemandedMask);
> -  SDValue DemandedRHS = DAG.GetDemandedBits(RHS, DemandedMask);
> -  if (DemandedLHS || DemandedRHS)
> -    return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0),
> -                       DemandedLHS ? DemandedLHS : LHS,
> -                       DemandedRHS ? DemandedRHS : RHS);
> -
>    // PMULDQ/PMULUDQ only uses lower 32 bits from each vector element.
>    const TargetLowering &TLI = DAG.getTargetLoweringInfo();
>    if (TLI.SimplifyDemandedBits(SDValue(N, 0), APInt::getAllOnesValue(64),
> DCI))
>
> Modified: llvm/trunk/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll?rev=367100&r1=367099&r2=367100&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll Fri Jul 26
> 04:10:20 2019
> @@ -11,32 +11,30 @@
>  define <4 x i32> @test_urem_odd_even(<4 x i32> %X) nounwind {
>  ; CHECK-SSE2-LABEL: test_urem_odd_even:
>  ; CHECK-SSE2:       # %bb.0:
> -; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm1
> -; CHECK-SSE2-NEXT:    psrld $1, %xmm1
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]
> -; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,1374389535,1374389535]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm2, %xmm4
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,3,2,3]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
> +; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 =
> [3435973837,2454267027,1374389535,1374389535]
> +; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm2
> +; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]
> +; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm3
> +; CHECK-SSE2-NEXT:    psrld $1, %xmm3
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[3,3]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
>  ; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm1
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
> -; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm2[0],xmm1[1],xmm2[1]
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    psrld $5, %xmm2
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm3
> +; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm2 =
> xmm2[0],xmm1[0],xmm2[1],xmm1[1]
> +; CHECK-SSE2-NEXT:    movdqa %xmm2, %xmm1
> +; CHECK-SSE2-NEXT:    psrld $5, %xmm1
> +; CHECK-SSE2-NEXT:    movdqa %xmm2, %xmm3
>  ; CHECK-SSE2-NEXT:    psrld $2, %xmm3
> -; CHECK-SSE2-NEXT:    psrld $3, %xmm1
> -; CHECK-SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm3[0],xmm1[1]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm2[3,3]
> -; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [5,14,25,100]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
> +; CHECK-SSE2-NEXT:    psrld $3, %xmm2
> +; CHECK-SSE2-NEXT:    movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[3,3]
> +; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [5,14,25,100]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]
>  ; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm4
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[0,2,2,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm2, %xmm1
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
> +; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
>  ; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm3[0],xmm1[1],xmm3[1]
>  ; CHECK-SSE2-NEXT:    psubd %xmm1, %xmm0
>  ; CHECK-SSE2-NEXT:    pxor %xmm1, %xmm1
> @@ -48,14 +46,13 @@ define <4 x i32> @test_urem_odd_even(<4
>  ; CHECK-SSE41:       # %bb.0:
>  ; CHECK-SSE41-NEXT:    movdqa %xmm0, %xmm1
>  ; CHECK-SSE41-NEXT:    psrld $1, %xmm1
> -; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> -; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,1374389535,1374389535]
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-SSE41-NEXT:    pmuludq %xmm2, %xmm4
> -; CHECK-SSE41-NEXT:    pmuludq %xmm3, %xmm1
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm4[2,3],xmm1[4,5],xmm4[6,7]
> +; CHECK-SSE41-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> +; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm2 =
> [3435973837,2454267027,1374389535,1374389535]
> +; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
> +; CHECK-SSE41-NEXT:    pmuludq %xmm1, %xmm3
> +; CHECK-SSE41-NEXT:    pmuludq %xmm0, %xmm2
> +; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
> +; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
>  ; CHECK-SSE41-NEXT:    movdqa %xmm1, %xmm2
>  ; CHECK-SSE41-NEXT:    psrld $5, %xmm2
>  ; CHECK-SSE41-NEXT:    movdqa %xmm1, %xmm3
> @@ -74,14 +71,13 @@ define <4 x i32> @test_urem_odd_even(<4
>  ; CHECK-AVX1-LABEL: test_urem_odd_even:
>  ; CHECK-AVX1:       # %bb.0:
>  ; CHECK-AVX1-NEXT:    vpsrld $1, %xmm0, %xmm1
> -; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,1374389535,1374389535]
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vpmuludq %xmm4, %xmm2, %xmm2
> +; CHECK-AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> +; CHECK-AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 =
> [3435973837,2454267027,1374389535,1374389535]
> +; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
>  ; CHECK-AVX1-NEXT:    vpmuludq %xmm3, %xmm1, %xmm1
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
> +; CHECK-AVX1-NEXT:    vpmuludq %xmm2, %xmm0, %xmm2
> +; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
> +; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
>  ; CHECK-AVX1-NEXT:    vpsrld $5, %xmm1, %xmm2
>  ; CHECK-AVX1-NEXT:    vpsrld $2, %xmm1, %xmm3
>  ; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
> @@ -410,32 +406,30 @@ define <4 x i32> @test_urem_even_allones
>  define <4 x i32> @test_urem_odd_even_allones_eq(<4 x i32> %X) nounwind {
>  ; CHECK-SSE2-LABEL: test_urem_odd_even_allones_eq:
>  ; CHECK-SSE2:       # %bb.0:
> -; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm1
> -; CHECK-SSE2-NEXT:    psrld $1, %xmm1
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]
> -; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,2147483649,1374389535]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm2, %xmm4
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,3,2,3]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
> +; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 =
> [3435973837,2454267027,2147483649,1374389535]
> +; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm2
> +; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]
> +; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm3
> +; CHECK-SSE2-NEXT:    psrld $1, %xmm3
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[3,3]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
>  ; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm1
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
> -; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm2[0],xmm1[1],xmm2[1]
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    psrld $5, %xmm2
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm3
> +; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm2 =
> xmm2[0],xmm1[0],xmm2[1],xmm1[1]
> +; CHECK-SSE2-NEXT:    movdqa %xmm2, %xmm1
> +; CHECK-SSE2-NEXT:    psrld $5, %xmm1
> +; CHECK-SSE2-NEXT:    movdqa %xmm2, %xmm3
>  ; CHECK-SSE2-NEXT:    psrld $2, %xmm3
> -; CHECK-SSE2-NEXT:    psrld $31, %xmm1
> -; CHECK-SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm3[0],xmm1[1]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm2[3,3]
> -; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [5,14,4294967295,100]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
> +; CHECK-SSE2-NEXT:    psrld $31, %xmm2
> +; CHECK-SSE2-NEXT:    movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[3,3]
> +; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [5,14,4294967295,100]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]
>  ; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm4
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[0,2,2,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm2, %xmm1
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
> +; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
>  ; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm3[0],xmm1[1],xmm3[1]
>  ; CHECK-SSE2-NEXT:    psubd %xmm1, %xmm0
>  ; CHECK-SSE2-NEXT:    pxor %xmm1, %xmm1
> @@ -447,14 +441,13 @@ define <4 x i32> @test_urem_odd_even_all
>  ; CHECK-SSE41:       # %bb.0:
>  ; CHECK-SSE41-NEXT:    movdqa %xmm0, %xmm1
>  ; CHECK-SSE41-NEXT:    psrld $1, %xmm1
> -; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> -; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,2147483649,1374389535]
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-SSE41-NEXT:    pmuludq %xmm2, %xmm4
> -; CHECK-SSE41-NEXT:    pmuludq %xmm3, %xmm1
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm4[2,3],xmm1[4,5],xmm4[6,7]
> +; CHECK-SSE41-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> +; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm2 =
> [3435973837,2454267027,2147483649,1374389535]
> +; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
> +; CHECK-SSE41-NEXT:    pmuludq %xmm1, %xmm3
> +; CHECK-SSE41-NEXT:    pmuludq %xmm0, %xmm2
> +; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
> +; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
>  ; CHECK-SSE41-NEXT:    movdqa %xmm1, %xmm2
>  ; CHECK-SSE41-NEXT:    psrld $5, %xmm2
>  ; CHECK-SSE41-NEXT:    movdqa %xmm1, %xmm3
> @@ -473,14 +466,13 @@ define <4 x i32> @test_urem_odd_even_all
>  ; CHECK-AVX1-LABEL: test_urem_odd_even_allones_eq:
>  ; CHECK-AVX1:       # %bb.0:
>  ; CHECK-AVX1-NEXT:    vpsrld $1, %xmm0, %xmm1
> -; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,2147483649,1374389535]
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vpmuludq %xmm4, %xmm2, %xmm2
> +; CHECK-AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> +; CHECK-AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 =
> [3435973837,2454267027,2147483649,1374389535]
> +; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
>  ; CHECK-AVX1-NEXT:    vpmuludq %xmm3, %xmm1, %xmm1
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
> +; CHECK-AVX1-NEXT:    vpmuludq %xmm2, %xmm0, %xmm2
> +; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
> +; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
>  ; CHECK-AVX1-NEXT:    vpsrld $5, %xmm1, %xmm2
>  ; CHECK-AVX1-NEXT:    vpsrld $2, %xmm1, %xmm3
>  ; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
> @@ -528,32 +520,30 @@ define <4 x i32> @test_urem_odd_even_all
>  define <4 x i32> @test_urem_odd_even_allones_ne(<4 x i32> %X) nounwind {
>  ; CHECK-SSE2-LABEL: test_urem_odd_even_allones_ne:
>  ; CHECK-SSE2:       # %bb.0:
> -; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm1
> -; CHECK-SSE2-NEXT:    psrld $1, %xmm1
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]
> -; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,2147483649,1374389535]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm2, %xmm4
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,3,2,3]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
> +; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 =
> [3435973837,2454267027,2147483649,1374389535]
> +; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm2
> +; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]
> +; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm3
> +; CHECK-SSE2-NEXT:    psrld $1, %xmm3
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[3,3]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
>  ; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm1
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
> -; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm2[0],xmm1[1],xmm2[1]
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    psrld $5, %xmm2
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm3
> +; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm2 =
> xmm2[0],xmm1[0],xmm2[1],xmm1[1]
> +; CHECK-SSE2-NEXT:    movdqa %xmm2, %xmm1
> +; CHECK-SSE2-NEXT:    psrld $5, %xmm1
> +; CHECK-SSE2-NEXT:    movdqa %xmm2, %xmm3
>  ; CHECK-SSE2-NEXT:    psrld $2, %xmm3
> -; CHECK-SSE2-NEXT:    psrld $31, %xmm1
> -; CHECK-SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm3[0],xmm1[1]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm2[3,3]
> -; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [5,14,4294967295,100]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
> +; CHECK-SSE2-NEXT:    psrld $31, %xmm2
> +; CHECK-SSE2-NEXT:    movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[3,3]
> +; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [5,14,4294967295,100]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]
>  ; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm4
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[0,2,2,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm2, %xmm1
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
> +; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
>  ; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm3[0],xmm1[1],xmm3[1]
>  ; CHECK-SSE2-NEXT:    psubd %xmm1, %xmm0
>  ; CHECK-SSE2-NEXT:    pxor %xmm1, %xmm1
> @@ -565,14 +555,13 @@ define <4 x i32> @test_urem_odd_even_all
>  ; CHECK-SSE41:       # %bb.0:
>  ; CHECK-SSE41-NEXT:    movdqa %xmm0, %xmm1
>  ; CHECK-SSE41-NEXT:    psrld $1, %xmm1
> -; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> -; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,2147483649,1374389535]
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-SSE41-NEXT:    pmuludq %xmm2, %xmm4
> -; CHECK-SSE41-NEXT:    pmuludq %xmm3, %xmm1
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm4[2,3],xmm1[4,5],xmm4[6,7]
> +; CHECK-SSE41-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> +; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm2 =
> [3435973837,2454267027,2147483649,1374389535]
> +; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
> +; CHECK-SSE41-NEXT:    pmuludq %xmm1, %xmm3
> +; CHECK-SSE41-NEXT:    pmuludq %xmm0, %xmm2
> +; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
> +; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
>  ; CHECK-SSE41-NEXT:    movdqa %xmm1, %xmm2
>  ; CHECK-SSE41-NEXT:    psrld $5, %xmm2
>  ; CHECK-SSE41-NEXT:    movdqa %xmm1, %xmm3
> @@ -591,14 +580,13 @@ define <4 x i32> @test_urem_odd_even_all
>  ; CHECK-AVX1-LABEL: test_urem_odd_even_allones_ne:
>  ; CHECK-AVX1:       # %bb.0:
>  ; CHECK-AVX1-NEXT:    vpsrld $1, %xmm0, %xmm1
> -; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,2147483649,1374389535]
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vpmuludq %xmm4, %xmm2, %xmm2
> +; CHECK-AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> +; CHECK-AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 =
> [3435973837,2454267027,2147483649,1374389535]
> +; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
>  ; CHECK-AVX1-NEXT:    vpmuludq %xmm3, %xmm1, %xmm1
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
> +; CHECK-AVX1-NEXT:    vpmuludq %xmm2, %xmm0, %xmm2
> +; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
> +; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
>  ; CHECK-AVX1-NEXT:    vpsrld $5, %xmm1, %xmm2
>  ; CHECK-AVX1-NEXT:    vpsrld $2, %xmm1, %xmm3
>  ; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
> @@ -840,31 +828,29 @@ define <4 x i32> @test_urem_even_powerof
>  define <4 x i32> @test_urem_odd_even_poweroftwo(<4 x i32> %X) nounwind {
>  ; CHECK-SSE2-LABEL: test_urem_odd_even_poweroftwo:
>  ; CHECK-SSE2:       # %bb.0:
> -; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm1
> -; CHECK-SSE2-NEXT:    psrld $1, %xmm1
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]
> -; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,268435456,1374389535]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm2, %xmm4
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,3,2,3]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
> +; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 =
> [3435973837,2454267027,268435456,1374389535]
> +; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm2
> +; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]
> +; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm3
> +; CHECK-SSE2-NEXT:    psrld $1, %xmm3
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[3,3]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
>  ; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm1
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
> -; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm2[0],xmm1[1],xmm2[1]
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    psrld $5, %xmm2
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm3
> +; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm2 =
> xmm2[0],xmm1[0],xmm2[1],xmm1[1]
> +; CHECK-SSE2-NEXT:    movdqa %xmm2, %xmm1
> +; CHECK-SSE2-NEXT:    psrld $5, %xmm1
> +; CHECK-SSE2-NEXT:    movdqa %xmm2, %xmm3
>  ; CHECK-SSE2-NEXT:    psrld $2, %xmm3
> -; CHECK-SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm3[0],xmm1[1]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm2[3,3]
> -; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [5,14,16,100]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
> +; CHECK-SSE2-NEXT:    movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[3,3]
> +; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [5,14,16,100]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]
>  ; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm4
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[0,2,2,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm2, %xmm1
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
> +; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
>  ; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm3[0],xmm1[1],xmm3[1]
>  ; CHECK-SSE2-NEXT:    psubd %xmm1, %xmm0
>  ; CHECK-SSE2-NEXT:    pxor %xmm1, %xmm1
> @@ -876,14 +862,13 @@ define <4 x i32> @test_urem_odd_even_pow
>  ; CHECK-SSE41:       # %bb.0:
>  ; CHECK-SSE41-NEXT:    movdqa %xmm0, %xmm1
>  ; CHECK-SSE41-NEXT:    psrld $1, %xmm1
> -; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> -; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,268435456,1374389535]
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-SSE41-NEXT:    pmuludq %xmm2, %xmm4
> -; CHECK-SSE41-NEXT:    pmuludq %xmm3, %xmm1
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm4[2,3],xmm1[4,5],xmm4[6,7]
> +; CHECK-SSE41-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> +; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm2 =
> [3435973837,2454267027,268435456,1374389535]
> +; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
> +; CHECK-SSE41-NEXT:    pmuludq %xmm1, %xmm3
> +; CHECK-SSE41-NEXT:    pmuludq %xmm0, %xmm2
> +; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
> +; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
>  ; CHECK-SSE41-NEXT:    movdqa %xmm1, %xmm2
>  ; CHECK-SSE41-NEXT:    psrld $5, %xmm2
>  ; CHECK-SSE41-NEXT:    movdqa %xmm1, %xmm3
> @@ -901,14 +886,13 @@ define <4 x i32> @test_urem_odd_even_pow
>  ; CHECK-AVX1-LABEL: test_urem_odd_even_poweroftwo:
>  ; CHECK-AVX1:       # %bb.0:
>  ; CHECK-AVX1-NEXT:    vpsrld $1, %xmm0, %xmm1
> -; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,268435456,1374389535]
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vpmuludq %xmm4, %xmm2, %xmm2
> +; CHECK-AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> +; CHECK-AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 =
> [3435973837,2454267027,268435456,1374389535]
> +; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
>  ; CHECK-AVX1-NEXT:    vpmuludq %xmm3, %xmm1, %xmm1
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
> +; CHECK-AVX1-NEXT:    vpmuludq %xmm2, %xmm0, %xmm2
> +; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
> +; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
>  ; CHECK-AVX1-NEXT:    vpsrld $5, %xmm1, %xmm2
>  ; CHECK-AVX1-NEXT:    vpsrld $2, %xmm1, %xmm3
>  ; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
> @@ -1122,33 +1106,31 @@ define <4 x i32> @test_urem_even_one(<4
>  define <4 x i32> @test_urem_odd_even_one(<4 x i32> %X) nounwind {
>  ; CHECK-SSE2-LABEL: test_urem_odd_even_one:
>  ; CHECK-SSE2:       # %bb.0:
> -; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm1
> -; CHECK-SSE2-NEXT:    psrld $1, %xmm1
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]
> -; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,0,1374389535]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm2, %xmm4
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,3,2,3]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
> +; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 =
> [3435973837,2454267027,0,1374389535]
> +; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm2
> +; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]
> +; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm3
> +; CHECK-SSE2-NEXT:    psrld $1, %xmm3
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[3,3]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
>  ; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm1
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
> -; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm2[0],xmm1[1],xmm2[1]
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    psrld $5, %xmm2
> -; CHECK-SSE2-NEXT:    psrld $2, %xmm1
> -; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm3
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm2[3,3]
> +; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm2 =
> xmm2[0],xmm1[0],xmm2[1],xmm1[1]
> +; CHECK-SSE2-NEXT:    movdqa %xmm2, %xmm1
> +; CHECK-SSE2-NEXT:    psrld $5, %xmm1
> +; CHECK-SSE2-NEXT:    psrld $2, %xmm2
> +; CHECK-SSE2-NEXT:    movdqa %xmm2, %xmm3
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[3,3]
>  ; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [5,14,1,100]
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[1,1,3,3]
>  ; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm5
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm5[0,2,2,3]
>  ; CHECK-SSE2-NEXT:    movaps %xmm0, %xmm5
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm5 = xmm5[2,0],xmm2[3,0]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,1],xmm5[0,2]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm4, %xmm1
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm5 = xmm5[2,0],xmm1[3,0]
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,1],xmm5[0,2]
> +; CHECK-SSE2-NEXT:    pmuludq %xmm4, %xmm2
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
>  ; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm3[0],xmm1[1],xmm3[1]
>  ; CHECK-SSE2-NEXT:    psubd %xmm1, %xmm0
>  ; CHECK-SSE2-NEXT:    pxor %xmm1, %xmm1
> @@ -1160,14 +1142,13 @@ define <4 x i32> @test_urem_odd_even_one
>  ; CHECK-SSE41:       # %bb.0:
>  ; CHECK-SSE41-NEXT:    movdqa %xmm0, %xmm1
>  ; CHECK-SSE41-NEXT:    psrld $1, %xmm1
> -; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> -; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,0,1374389535]
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-SSE41-NEXT:    pmuludq %xmm2, %xmm4
> -; CHECK-SSE41-NEXT:    pmuludq %xmm3, %xmm1
> -; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm4[2,3],xmm1[4,5],xmm4[6,7]
> +; CHECK-SSE41-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> +; CHECK-SSE41-NEXT:    movdqa {{.*#+}} xmm2 =
> [3435973837,2454267027,0,1374389535]
> +; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
> +; CHECK-SSE41-NEXT:    pmuludq %xmm1, %xmm3
> +; CHECK-SSE41-NEXT:    pmuludq %xmm0, %xmm2
> +; CHECK-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
> +; CHECK-SSE41-NEXT:    pblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
>  ; CHECK-SSE41-NEXT:    movdqa %xmm1, %xmm2
>  ; CHECK-SSE41-NEXT:    psrld $5, %xmm2
>  ; CHECK-SSE41-NEXT:    psrld $2, %xmm1
> @@ -1183,14 +1164,13 @@ define <4 x i32> @test_urem_odd_even_one
>  ; CHECK-AVX1-LABEL: test_urem_odd_even_one:
>  ; CHECK-AVX1:       # %bb.0:
>  ; CHECK-AVX1-NEXT:    vpsrld $1, %xmm0, %xmm1
> -; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 =
> [3435973837,2454267027,0,1374389535]
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vpmuludq %xmm4, %xmm2, %xmm2
> +; CHECK-AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> +; CHECK-AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 =
> [3435973837,2454267027,0,1374389535]
> +; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
>  ; CHECK-AVX1-NEXT:    vpmuludq %xmm3, %xmm1, %xmm1
> -; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
> +; CHECK-AVX1-NEXT:    vpmuludq %xmm2, %xmm0, %xmm2
> +; CHECK-AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
> +; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 =
> xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
>  ; CHECK-AVX1-NEXT:    vpsrld $5, %xmm1, %xmm2
>  ; CHECK-AVX1-NEXT:    vpsrld $2, %xmm1, %xmm1
>  ; CHECK-AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7]
> @@ -2180,27 +2160,25 @@ define <4 x i32> @test_urem_odd_allones_
>  ; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm1 =
> [3435973837,2147483649,268435456,0]
>  ; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm2
>  ; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[1,3,2,3]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm4
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm4[1,3,2,3]
> -; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm3 =
> xmm3[0],xmm1[0],xmm3[1],xmm1[1]
> -; CHECK-SSE2-NEXT:    movdqa %xmm3, %xmm1
> -; CHECK-SSE2-NEXT:    psrld $31, %xmm1
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> -; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [5,4294967295,16,1]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[1,1,3,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm5
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm5[0,2,2,3]
> -; CHECK-SSE2-NEXT:    psrld $2, %xmm3
> -; CHECK-SSE2-NEXT:    movaps %xmm0, %xmm5
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm5 = xmm5[3,0],xmm2[3,3]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm3 = xmm3[0,3],xmm5[2,0]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm4, %xmm3
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
> +; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm3
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm3[1,3,2,3]
>  ; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm2 =
> xmm2[0],xmm1[0],xmm2[1],xmm1[1]
> -; CHECK-SSE2-NEXT:    psubd %xmm2, %xmm0
> +; CHECK-SSE2-NEXT:    movdqa %xmm2, %xmm1
> +; CHECK-SSE2-NEXT:    psrld $2, %xmm1
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,3],xmm2[2,1]
> +; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [5,4294967295,16,1]
> +; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm1
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
> +; CHECK-SSE2-NEXT:    psrld $31, %xmm2
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
> +; CHECK-SSE2-NEXT:    pmuludq %xmm2, %xmm3
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
> +; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm2[0],xmm1[1],xmm2[1]
> +; CHECK-SSE2-NEXT:    psubd %xmm1, %xmm0
>  ; CHECK-SSE2-NEXT:    pxor %xmm1, %xmm1
>  ; CHECK-SSE2-NEXT:    pcmpeqd %xmm1, %xmm0
>  ; CHECK-SSE2-NEXT:    psrld $31, %xmm0
> @@ -2297,20 +2275,18 @@ define <4 x i32> @test_urem_even_allones
>  ; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm4[1,3,2,3]
>  ; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm2[0],xmm1[1],xmm2[1]
>  ; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm2
> -; CHECK-SSE2-NEXT:    psrld $31, %xmm2
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]
> +; CHECK-SSE2-NEXT:    psrld $2, %xmm2
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,3],xmm1[2,1]
>  ; CHECK-SSE2-NEXT:    movdqa {{.*#+}} xmm3 = [14,4294967295,16,1]
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm3[1,1,3,3]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm2, %xmm5
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm5[0,2,2,3]
> -; CHECK-SSE2-NEXT:    psrld $2, %xmm1
> -; CHECK-SSE2-NEXT:    movaps %xmm0, %xmm5
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm5 = xmm5[3,0],xmm4[3,3]
> -; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,3],xmm5[2,0]
> -; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm1
> -; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
> -; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 =
> xmm1[0],xmm2[0],xmm1[1],xmm2[1]
> -; CHECK-SSE2-NEXT:    psubd %xmm1, %xmm0
> +; CHECK-SSE2-NEXT:    pmuludq %xmm3, %xmm2
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
> +; CHECK-SSE2-NEXT:    psrld $31, %xmm1
> +; CHECK-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
> +; CHECK-SSE2-NEXT:    pmuludq %xmm1, %xmm3
> +; CHECK-SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
> +; CHECK-SSE2-NEXT:    punpckldq {{.*#+}} xmm2 =
> xmm2[0],xmm1[0],xmm2[1],xmm1[1]
> +; CHECK-SSE2-NEXT:    psubd %xmm2, %xmm0
>  ; CHECK-SSE2-NEXT:    pxor %xmm1, %xmm1
>  ; CHECK-SSE2-NEXT:    pcmpeqd %xmm1, %xmm0
>  ; CHECK-SSE2-NEXT:    psrld $31, %xmm0
>
> Modified: llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll?rev=367100&r1=367099&r2=367100&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll Fri Jul 26
> 04:10:20 2019
> @@ -814,12 +814,8 @@ define i32 @test_v4i32(<4 x i32> %a0) {
>  ; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[3,3,1,1]
>  ; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm2, %xmm3
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> +; SSE2-NEXT:    pmuludq %xmm3, %xmm1
>  ; SSE2-NEXT:    movd %xmm1, %eax
>  ; SSE2-NEXT:    retq
>  ;
> @@ -856,23 +852,16 @@ define i32 @test_v4i32(<4 x i32> %a0) {
>  define i32 @test_v8i32(<8 x i32> %a0) {
>  ; SSE2-LABEL: test_v8i32:
>  ; SSE2:       # %bb.0:
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm2, %xmm3
>  ; SSE2-NEXT:    pmuludq %xmm1, %xmm0
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm2, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm2
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[2,2,0,0]
> -; SSE2-NEXT:    pmuludq %xmm1, %xmm2
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    movd %xmm1, %eax
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[2,2,0,0]
> +; SSE2-NEXT:    pmuludq %xmm3, %xmm0
> +; SSE2-NEXT:    pmuludq %xmm1, %xmm0
> +; SSE2-NEXT:    movd %xmm0, %eax
>  ; SSE2-NEXT:    retq
>  ;
>  ; SSE41-LABEL: test_v8i32:
> @@ -927,29 +916,22 @@ define i32 @test_v8i32(<8 x i32> %a0) {
>  define i32 @test_v16i32(<16 x i32> %a0) {
>  ; SSE2-LABEL: test_v16i32:
>  ; SSE2:       # %bb.0:
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm1[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm4, %xmm5
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm4, %xmm6
> -; SSE2-NEXT:    pmuludq %xmm5, %xmm6
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm3, %xmm1
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm2, %xmm0
>  ; SSE2-NEXT:    pmuludq %xmm1, %xmm0
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm6[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm3[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm4, %xmm1
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm5, %xmm2
> +; SSE2-NEXT:    pmuludq %xmm1, %xmm2
>  ; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm6[2,2,0,0]
> -; SSE2-NEXT:    pmuludq %xmm6, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    movd %xmm1, %eax
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,2,0,0]
> +; SSE2-NEXT:    pmuludq %xmm2, %xmm0
> +; SSE2-NEXT:    pmuludq %xmm1, %xmm0
> +; SSE2-NEXT:    movd %xmm0, %eax
>  ; SSE2-NEXT:    retq
>  ;
>  ; SSE41-LABEL: test_v16i32:
> @@ -1012,39 +994,32 @@ define i32 @test_v16i32(<16 x i32> %a0)
>  define i32 @test_v32i32(<32 x i32> %a0) {
>  ; SSE2-LABEL: test_v32i32:
>  ; SSE2:       # %bb.0:
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm2[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm6[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm9 = xmm2[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm8, %xmm9
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm4[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm10 = xmm0[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm8, %xmm10
> +; SSE2-NEXT:    pmuludq %xmm9, %xmm10
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm7[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm9 = xmm3[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm8, %xmm9
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm5[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm11 = xmm1[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm8, %xmm11
> +; SSE2-NEXT:    pmuludq %xmm9, %xmm11
> +; SSE2-NEXT:    pmuludq %xmm10, %xmm11
>  ; SSE2-NEXT:    pmuludq %xmm6, %xmm2
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm9 = xmm0[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm4, %xmm0
>  ; SSE2-NEXT:    pmuludq %xmm2, %xmm0
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm7, %xmm3
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm10 = xmm1[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm5, %xmm1
>  ; SSE2-NEXT:    pmuludq %xmm3, %xmm1
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm8, %xmm0
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm9, %xmm3
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm3
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm2, %xmm0
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm10, %xmm2
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm2
> -; SSE2-NEXT:    pmuludq %xmm3, %xmm2
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[2,2,0,0]
> -; SSE2-NEXT:    pmuludq %xmm2, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
> +; SSE2-NEXT:    pmuludq %xmm1, %xmm0
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm11[2,2,0,0]
> +; SSE2-NEXT:    pmuludq %xmm11, %xmm1
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
>  ; SSE2-NEXT:    movd %xmm1, %eax
>  ; SSE2-NEXT:    retq
>
> Modified: llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll?rev=367100&r1=367099&r2=367100&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll Fri Jul 26 04:10:20
> 2019
> @@ -807,12 +807,8 @@ define i32 @test_v4i32(<4 x i32> %a0) {
>  ; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[3,3,1,1]
>  ; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm2, %xmm3
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> +; SSE2-NEXT:    pmuludq %xmm3, %xmm1
>  ; SSE2-NEXT:    movd %xmm1, %eax
>  ; SSE2-NEXT:    retq
>  ;
> @@ -849,23 +845,16 @@ define i32 @test_v4i32(<4 x i32> %a0) {
>  define i32 @test_v8i32(<8 x i32> %a0) {
>  ; SSE2-LABEL: test_v8i32:
>  ; SSE2:       # %bb.0:
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm2, %xmm3
>  ; SSE2-NEXT:    pmuludq %xmm1, %xmm0
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm2, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm2
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[2,2,0,0]
> -; SSE2-NEXT:    pmuludq %xmm1, %xmm2
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    movd %xmm1, %eax
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[2,2,0,0]
> +; SSE2-NEXT:    pmuludq %xmm3, %xmm0
> +; SSE2-NEXT:    pmuludq %xmm1, %xmm0
> +; SSE2-NEXT:    movd %xmm0, %eax
>  ; SSE2-NEXT:    retq
>  ;
>  ; SSE41-LABEL: test_v8i32:
> @@ -920,29 +909,22 @@ define i32 @test_v8i32(<8 x i32> %a0) {
>  define i32 @test_v16i32(<16 x i32> %a0) {
>  ; SSE2-LABEL: test_v16i32:
>  ; SSE2:       # %bb.0:
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm1[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm4, %xmm5
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm4, %xmm6
> -; SSE2-NEXT:    pmuludq %xmm5, %xmm6
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm3, %xmm1
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm2, %xmm0
>  ; SSE2-NEXT:    pmuludq %xmm1, %xmm0
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm6[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm3[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm4, %xmm1
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm5, %xmm2
> +; SSE2-NEXT:    pmuludq %xmm1, %xmm2
>  ; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm6[2,2,0,0]
> -; SSE2-NEXT:    pmuludq %xmm6, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    movd %xmm1, %eax
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,2,0,0]
> +; SSE2-NEXT:    pmuludq %xmm2, %xmm0
> +; SSE2-NEXT:    pmuludq %xmm1, %xmm0
> +; SSE2-NEXT:    movd %xmm0, %eax
>  ; SSE2-NEXT:    retq
>  ;
>  ; SSE41-LABEL: test_v16i32:
> @@ -1005,39 +987,32 @@ define i32 @test_v16i32(<16 x i32> %a0)
>  define i32 @test_v32i32(<32 x i32> %a0) {
>  ; SSE2-LABEL: test_v32i32:
>  ; SSE2:       # %bb.0:
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm2[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm6[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm9 = xmm2[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm8, %xmm9
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm4[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm10 = xmm0[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm8, %xmm10
> +; SSE2-NEXT:    pmuludq %xmm9, %xmm10
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm7[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm9 = xmm3[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm8, %xmm9
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm5[1,1,3,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm11 = xmm1[1,1,3,3]
> +; SSE2-NEXT:    pmuludq %xmm8, %xmm11
> +; SSE2-NEXT:    pmuludq %xmm9, %xmm11
> +; SSE2-NEXT:    pmuludq %xmm10, %xmm11
>  ; SSE2-NEXT:    pmuludq %xmm6, %xmm2
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm9 = xmm0[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm4, %xmm0
>  ; SSE2-NEXT:    pmuludq %xmm2, %xmm0
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm7, %xmm3
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm10 = xmm1[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm5, %xmm1
>  ; SSE2-NEXT:    pmuludq %xmm3, %xmm1
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm8, %xmm0
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm9, %xmm3
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm3
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm2, %xmm0
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3]
> -; SSE2-NEXT:    pmuludq %xmm10, %xmm2
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm2
> -; SSE2-NEXT:    pmuludq %xmm3, %xmm2
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[2,2,0,0]
> -; SSE2-NEXT:    pmuludq %xmm2, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
> +; SSE2-NEXT:    pmuludq %xmm1, %xmm0
> +; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm11[2,2,0,0]
> +; SSE2-NEXT:    pmuludq %xmm11, %xmm1
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
>  ; SSE2-NEXT:    movd %xmm1, %eax
>  ; SSE2-NEXT:    retq
> @@ -1151,12 +1126,8 @@ define i16 @test_v4i16(<4 x i16> %a0) {
>  ; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[3,3,1,1]
>  ; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm2, %xmm3
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> +; SSE2-NEXT:    pmuludq %xmm3, %xmm1
>  ; SSE2-NEXT:    pextrw $0, %xmm1, %eax
>  ; SSE2-NEXT:    # kill: def $ax killed $ax killed $eax
>  ; SSE2-NEXT:    retq
> @@ -1603,12 +1574,8 @@ define i8 @test_v4i8(<4 x i8> %a0) {
>  ; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[3,3,1,1]
>  ; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
>  ; SSE2-NEXT:    pmuludq %xmm2, %xmm3
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
> -; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
> -; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
> -; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
>  ; SSE2-NEXT:    pmuludq %xmm0, %xmm1
> +; SSE2-NEXT:    pmuludq %xmm3, %xmm1
>  ; SSE2-NEXT:    movd %xmm1, %eax
>  ; SSE2-NEXT:    # kill: def $al killed $al killed $eax
>  ; SSE2-NEXT:    retq
>
>
> _______________________________________________
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