<div dir="ltr">I've reverted this change as it seemed to be responsible for test failures like <a href="http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/33847">this</a> after Nico's revert of r367091 landed.</div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Jul 26, 2019 at 4:09 AM Simon Pilgrim via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Author: rksimon<br>
Date: Fri Jul 26 04:10:20 2019<br>
New Revision: 367100<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=367100&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=367100&view=rev</a><br>
Log:<br>
[X86][SSE] Replace PMULDQ GetDemandedBits combine with SimplifyMultipleUseDemandedBits handler.<br>
<br>
This removes a GetDemandedBits user and allows us to benefit from the DemandedElts propagated through SimplifyDemandedBits.<br>
<br>
Modified:<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
llvm/trunk/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll<br>
llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll<br>
llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=367100&r1=367099&r2=367100&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=367100&r1=367099&r2=367100&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Jul 26 04:10:20 2019<br>
@@ -34381,6 +34381,18 @@ bool X86TargetLowering::SimplifyDemanded<br>
if (SimplifyDemandedBits(RHS, DemandedMask, OriginalDemandedElts, KnownOp,<br>
TLO, Depth + 1))<br>
return true;<br>
+<br>
+ // Aggressively peek through ops to get at the demanded low bits.<br>
+ SDValue DemandedLHS = SimplifyMultipleUseDemandedBits(<br>
+ LHS, DemandedMask, OriginalDemandedElts, TLO.DAG, Depth + 1);<br>
+ SDValue DemandedRHS = SimplifyMultipleUseDemandedBits(<br>
+ RHS, DemandedMask, OriginalDemandedElts, TLO.DAG, Depth + 1);<br>
+ if (DemandedLHS || DemandedRHS) {<br>
+ DemandedLHS = DemandedLHS ? DemandedLHS : LHS;<br>
+ DemandedRHS = DemandedRHS ? DemandedRHS : RHS;<br>
+ return TLO.CombineTo(<br>
+ Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, DemandedLHS, DemandedRHS));<br>
+ }<br>
break;<br>
}<br>
case X86ISD::VSHLI: {<br>
@@ -44220,15 +44232,6 @@ static SDValue combinePMULDQ(SDNode *N,<br>
if (ISD::isBuildVectorAllZeros(RHS.getNode()))<br>
return RHS;<br>
<br>
- // Aggressively peek through ops to get at the demanded low bits.<br>
- APInt DemandedMask = APInt::getLowBitsSet(64, 32);<br>
- SDValue DemandedLHS = DAG.GetDemandedBits(LHS, DemandedMask);<br>
- SDValue DemandedRHS = DAG.GetDemandedBits(RHS, DemandedMask);<br>
- if (DemandedLHS || DemandedRHS)<br>
- return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0),<br>
- DemandedLHS ? DemandedLHS : LHS,<br>
- DemandedRHS ? DemandedRHS : RHS);<br>
-<br>
// PMULDQ/PMULUDQ only uses lower 32 bits from each vector element.<br>
const TargetLowering &TLI = DAG.getTargetLoweringInfo();<br>
if (TLI.SimplifyDemandedBits(SDValue(N, 0), APInt::getAllOnesValue(64), DCI))<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll?rev=367100&r1=367099&r2=367100&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll?rev=367100&r1=367099&r2=367100&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll Fri Jul 26 04:10:20 2019<br>
@@ -11,32 +11,30 @@<br>
define <4 x i32> @test_urem_odd_even(<4 x i32> %X) nounwind {<br>
; CHECK-SSE2-LABEL: test_urem_odd_even:<br>
; CHECK-SSE2: # %bb.0:<br>
-; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1<br>
-; CHECK-SSE2-NEXT: psrld $1, %xmm1<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]<br>
-; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm3 = [3435973837,2454267027,1374389535,1374389535]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm4<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,3,2,3]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]<br>
+; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,2454267027,1374389535,1374389535]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm2<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm3<br>
+; CHECK-SSE2-NEXT: psrld $1, %xmm3<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[3,3]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]<br>
-; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: psrld $5, %xmm2<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm3<br>
+; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm2, %xmm1<br>
+; CHECK-SSE2-NEXT: psrld $5, %xmm1<br>
+; CHECK-SSE2-NEXT: movdqa %xmm2, %xmm3<br>
; CHECK-SSE2-NEXT: psrld $2, %xmm3<br>
-; CHECK-SSE2-NEXT: psrld $3, %xmm1<br>
-; CHECK-SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm3[0],xmm1[1]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm2[3,3]<br>
-; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [5,14,25,100]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]<br>
+; CHECK-SSE2-NEXT: psrld $3, %xmm2<br>
+; CHECK-SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[3,3]<br>
+; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [5,14,25,100]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]<br>
; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm4<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[0,2,2,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm1<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]<br>
; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]<br>
; CHECK-SSE2-NEXT: psubd %xmm1, %xmm0<br>
; CHECK-SSE2-NEXT: pxor %xmm1, %xmm1<br>
@@ -48,14 +46,13 @@ define <4 x i32> @test_urem_odd_even(<4<br>
; CHECK-SSE41: # %bb.0:<br>
; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm1<br>
; CHECK-SSE41-NEXT: psrld $1, %xmm1<br>
-; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm3 = [3435973837,2454267027,1374389535,1374389535]<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: pmuludq %xmm2, %xmm4<br>
-; CHECK-SSE41-NEXT: pmuludq %xmm3, %xmm1<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm4[2,3],xmm1[4,5],xmm4[6,7]<br>
+; CHECK-SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
+; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [3435973837,2454267027,1374389535,1374389535]<br>
+; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]<br>
+; CHECK-SSE41-NEXT: pmuludq %xmm1, %xmm3<br>
+; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm2<br>
+; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]<br>
+; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]<br>
; CHECK-SSE41-NEXT: movdqa %xmm1, %xmm2<br>
; CHECK-SSE41-NEXT: psrld $5, %xmm2<br>
; CHECK-SSE41-NEXT: movdqa %xmm1, %xmm3<br>
@@ -74,14 +71,13 @@ define <4 x i32> @test_urem_odd_even(<4<br>
; CHECK-AVX1-LABEL: test_urem_odd_even:<br>
; CHECK-AVX1: # %bb.0:<br>
; CHECK-AVX1-NEXT: vpsrld $1, %xmm0, %xmm1<br>
-; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [3435973837,2454267027,1374389535,1374389535]<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vpmuludq %xmm4, %xmm2, %xmm2<br>
+; CHECK-AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
+; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [3435973837,2454267027,1374389535,1374389535]<br>
+; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]<br>
; CHECK-AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm1<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]<br>
+; CHECK-AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm2<br>
+; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]<br>
+; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]<br>
; CHECK-AVX1-NEXT: vpsrld $5, %xmm1, %xmm2<br>
; CHECK-AVX1-NEXT: vpsrld $2, %xmm1, %xmm3<br>
; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]<br>
@@ -410,32 +406,30 @@ define <4 x i32> @test_urem_even_allones<br>
define <4 x i32> @test_urem_odd_even_allones_eq(<4 x i32> %X) nounwind {<br>
; CHECK-SSE2-LABEL: test_urem_odd_even_allones_eq:<br>
; CHECK-SSE2: # %bb.0:<br>
-; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1<br>
-; CHECK-SSE2-NEXT: psrld $1, %xmm1<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]<br>
-; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm3 = [3435973837,2454267027,2147483649,1374389535]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm4<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,3,2,3]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]<br>
+; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,2454267027,2147483649,1374389535]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm2<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm3<br>
+; CHECK-SSE2-NEXT: psrld $1, %xmm3<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[3,3]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]<br>
-; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: psrld $5, %xmm2<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm3<br>
+; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm2, %xmm1<br>
+; CHECK-SSE2-NEXT: psrld $5, %xmm1<br>
+; CHECK-SSE2-NEXT: movdqa %xmm2, %xmm3<br>
; CHECK-SSE2-NEXT: psrld $2, %xmm3<br>
-; CHECK-SSE2-NEXT: psrld $31, %xmm1<br>
-; CHECK-SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm3[0],xmm1[1]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm2[3,3]<br>
-; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [5,14,4294967295,100]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]<br>
+; CHECK-SSE2-NEXT: psrld $31, %xmm2<br>
+; CHECK-SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[3,3]<br>
+; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [5,14,4294967295,100]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]<br>
; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm4<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[0,2,2,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm1<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]<br>
; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]<br>
; CHECK-SSE2-NEXT: psubd %xmm1, %xmm0<br>
; CHECK-SSE2-NEXT: pxor %xmm1, %xmm1<br>
@@ -447,14 +441,13 @@ define <4 x i32> @test_urem_odd_even_all<br>
; CHECK-SSE41: # %bb.0:<br>
; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm1<br>
; CHECK-SSE41-NEXT: psrld $1, %xmm1<br>
-; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm3 = [3435973837,2454267027,2147483649,1374389535]<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: pmuludq %xmm2, %xmm4<br>
-; CHECK-SSE41-NEXT: pmuludq %xmm3, %xmm1<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm4[2,3],xmm1[4,5],xmm4[6,7]<br>
+; CHECK-SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
+; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [3435973837,2454267027,2147483649,1374389535]<br>
+; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]<br>
+; CHECK-SSE41-NEXT: pmuludq %xmm1, %xmm3<br>
+; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm2<br>
+; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]<br>
+; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]<br>
; CHECK-SSE41-NEXT: movdqa %xmm1, %xmm2<br>
; CHECK-SSE41-NEXT: psrld $5, %xmm2<br>
; CHECK-SSE41-NEXT: movdqa %xmm1, %xmm3<br>
@@ -473,14 +466,13 @@ define <4 x i32> @test_urem_odd_even_all<br>
; CHECK-AVX1-LABEL: test_urem_odd_even_allones_eq:<br>
; CHECK-AVX1: # %bb.0:<br>
; CHECK-AVX1-NEXT: vpsrld $1, %xmm0, %xmm1<br>
-; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [3435973837,2454267027,2147483649,1374389535]<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vpmuludq %xmm4, %xmm2, %xmm2<br>
+; CHECK-AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
+; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [3435973837,2454267027,2147483649,1374389535]<br>
+; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]<br>
; CHECK-AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm1<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]<br>
+; CHECK-AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm2<br>
+; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]<br>
+; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]<br>
; CHECK-AVX1-NEXT: vpsrld $5, %xmm1, %xmm2<br>
; CHECK-AVX1-NEXT: vpsrld $2, %xmm1, %xmm3<br>
; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]<br>
@@ -528,32 +520,30 @@ define <4 x i32> @test_urem_odd_even_all<br>
define <4 x i32> @test_urem_odd_even_allones_ne(<4 x i32> %X) nounwind {<br>
; CHECK-SSE2-LABEL: test_urem_odd_even_allones_ne:<br>
; CHECK-SSE2: # %bb.0:<br>
-; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1<br>
-; CHECK-SSE2-NEXT: psrld $1, %xmm1<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]<br>
-; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm3 = [3435973837,2454267027,2147483649,1374389535]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm4<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,3,2,3]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]<br>
+; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,2454267027,2147483649,1374389535]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm2<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm3<br>
+; CHECK-SSE2-NEXT: psrld $1, %xmm3<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[3,3]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]<br>
-; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: psrld $5, %xmm2<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm3<br>
+; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm2, %xmm1<br>
+; CHECK-SSE2-NEXT: psrld $5, %xmm1<br>
+; CHECK-SSE2-NEXT: movdqa %xmm2, %xmm3<br>
; CHECK-SSE2-NEXT: psrld $2, %xmm3<br>
-; CHECK-SSE2-NEXT: psrld $31, %xmm1<br>
-; CHECK-SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm3[0],xmm1[1]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm2[3,3]<br>
-; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [5,14,4294967295,100]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]<br>
+; CHECK-SSE2-NEXT: psrld $31, %xmm2<br>
+; CHECK-SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[3,3]<br>
+; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [5,14,4294967295,100]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]<br>
; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm4<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[0,2,2,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm1<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]<br>
; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]<br>
; CHECK-SSE2-NEXT: psubd %xmm1, %xmm0<br>
; CHECK-SSE2-NEXT: pxor %xmm1, %xmm1<br>
@@ -565,14 +555,13 @@ define <4 x i32> @test_urem_odd_even_all<br>
; CHECK-SSE41: # %bb.0:<br>
; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm1<br>
; CHECK-SSE41-NEXT: psrld $1, %xmm1<br>
-; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm3 = [3435973837,2454267027,2147483649,1374389535]<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: pmuludq %xmm2, %xmm4<br>
-; CHECK-SSE41-NEXT: pmuludq %xmm3, %xmm1<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm4[2,3],xmm1[4,5],xmm4[6,7]<br>
+; CHECK-SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
+; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [3435973837,2454267027,2147483649,1374389535]<br>
+; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]<br>
+; CHECK-SSE41-NEXT: pmuludq %xmm1, %xmm3<br>
+; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm2<br>
+; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]<br>
+; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]<br>
; CHECK-SSE41-NEXT: movdqa %xmm1, %xmm2<br>
; CHECK-SSE41-NEXT: psrld $5, %xmm2<br>
; CHECK-SSE41-NEXT: movdqa %xmm1, %xmm3<br>
@@ -591,14 +580,13 @@ define <4 x i32> @test_urem_odd_even_all<br>
; CHECK-AVX1-LABEL: test_urem_odd_even_allones_ne:<br>
; CHECK-AVX1: # %bb.0:<br>
; CHECK-AVX1-NEXT: vpsrld $1, %xmm0, %xmm1<br>
-; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [3435973837,2454267027,2147483649,1374389535]<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vpmuludq %xmm4, %xmm2, %xmm2<br>
+; CHECK-AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
+; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [3435973837,2454267027,2147483649,1374389535]<br>
+; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]<br>
; CHECK-AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm1<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]<br>
+; CHECK-AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm2<br>
+; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]<br>
+; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]<br>
; CHECK-AVX1-NEXT: vpsrld $5, %xmm1, %xmm2<br>
; CHECK-AVX1-NEXT: vpsrld $2, %xmm1, %xmm3<br>
; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]<br>
@@ -840,31 +828,29 @@ define <4 x i32> @test_urem_even_powerof<br>
define <4 x i32> @test_urem_odd_even_poweroftwo(<4 x i32> %X) nounwind {<br>
; CHECK-SSE2-LABEL: test_urem_odd_even_poweroftwo:<br>
; CHECK-SSE2: # %bb.0:<br>
-; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1<br>
-; CHECK-SSE2-NEXT: psrld $1, %xmm1<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]<br>
-; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm3 = [3435973837,2454267027,268435456,1374389535]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm4<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,3,2,3]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]<br>
+; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,2454267027,268435456,1374389535]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm2<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm3<br>
+; CHECK-SSE2-NEXT: psrld $1, %xmm3<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[3,3]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]<br>
-; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: psrld $5, %xmm2<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm3<br>
+; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm2, %xmm1<br>
+; CHECK-SSE2-NEXT: psrld $5, %xmm1<br>
+; CHECK-SSE2-NEXT: movdqa %xmm2, %xmm3<br>
; CHECK-SSE2-NEXT: psrld $2, %xmm3<br>
-; CHECK-SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm3[0],xmm1[1]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm2[3,3]<br>
-; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [5,14,16,100]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]<br>
+; CHECK-SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[3,3]<br>
+; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [5,14,16,100]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]<br>
; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm4<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[0,2,2,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm1<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]<br>
; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]<br>
; CHECK-SSE2-NEXT: psubd %xmm1, %xmm0<br>
; CHECK-SSE2-NEXT: pxor %xmm1, %xmm1<br>
@@ -876,14 +862,13 @@ define <4 x i32> @test_urem_odd_even_pow<br>
; CHECK-SSE41: # %bb.0:<br>
; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm1<br>
; CHECK-SSE41-NEXT: psrld $1, %xmm1<br>
-; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm3 = [3435973837,2454267027,268435456,1374389535]<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: pmuludq %xmm2, %xmm4<br>
-; CHECK-SSE41-NEXT: pmuludq %xmm3, %xmm1<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm4[2,3],xmm1[4,5],xmm4[6,7]<br>
+; CHECK-SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
+; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [3435973837,2454267027,268435456,1374389535]<br>
+; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]<br>
+; CHECK-SSE41-NEXT: pmuludq %xmm1, %xmm3<br>
+; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm2<br>
+; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]<br>
+; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]<br>
; CHECK-SSE41-NEXT: movdqa %xmm1, %xmm2<br>
; CHECK-SSE41-NEXT: psrld $5, %xmm2<br>
; CHECK-SSE41-NEXT: movdqa %xmm1, %xmm3<br>
@@ -901,14 +886,13 @@ define <4 x i32> @test_urem_odd_even_pow<br>
; CHECK-AVX1-LABEL: test_urem_odd_even_poweroftwo:<br>
; CHECK-AVX1: # %bb.0:<br>
; CHECK-AVX1-NEXT: vpsrld $1, %xmm0, %xmm1<br>
-; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [3435973837,2454267027,268435456,1374389535]<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vpmuludq %xmm4, %xmm2, %xmm2<br>
+; CHECK-AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
+; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [3435973837,2454267027,268435456,1374389535]<br>
+; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]<br>
; CHECK-AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm1<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]<br>
+; CHECK-AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm2<br>
+; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]<br>
+; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]<br>
; CHECK-AVX1-NEXT: vpsrld $5, %xmm1, %xmm2<br>
; CHECK-AVX1-NEXT: vpsrld $2, %xmm1, %xmm3<br>
; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]<br>
@@ -1122,33 +1106,31 @@ define <4 x i32> @test_urem_even_one(<4<br>
define <4 x i32> @test_urem_odd_even_one(<4 x i32> %X) nounwind {<br>
; CHECK-SSE2-LABEL: test_urem_odd_even_one:<br>
; CHECK-SSE2: # %bb.0:<br>
-; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1<br>
-; CHECK-SSE2-NEXT: psrld $1, %xmm1<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]<br>
-; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm3 = [3435973837,2454267027,0,1374389535]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm4<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,3,2,3]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]<br>
+; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,2454267027,0,1374389535]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm2<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm3<br>
+; CHECK-SSE2-NEXT: psrld $1, %xmm3<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm0[3,3]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]<br>
-; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: psrld $5, %xmm2<br>
-; CHECK-SSE2-NEXT: psrld $2, %xmm1<br>
-; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm3<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm2[3,3]<br>
+; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]<br>
+; CHECK-SSE2-NEXT: movdqa %xmm2, %xmm1<br>
+; CHECK-SSE2-NEXT: psrld $5, %xmm1<br>
+; CHECK-SSE2-NEXT: psrld $2, %xmm2<br>
+; CHECK-SSE2-NEXT: movdqa %xmm2, %xmm3<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1],xmm1[3,3]<br>
; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm4 = [5,14,1,100]<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,1,3,3]<br>
; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm5<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm5[0,2,2,3]<br>
; CHECK-SSE2-NEXT: movaps %xmm0, %xmm5<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[2,0],xmm2[3,0]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm5[0,2]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm4, %xmm1<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[2,0],xmm1[3,0]<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,1],xmm5[0,2]<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm4, %xmm2<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]<br>
; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]<br>
; CHECK-SSE2-NEXT: psubd %xmm1, %xmm0<br>
; CHECK-SSE2-NEXT: pxor %xmm1, %xmm1<br>
@@ -1160,14 +1142,13 @@ define <4 x i32> @test_urem_odd_even_one<br>
; CHECK-SSE41: # %bb.0:<br>
; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm1<br>
; CHECK-SSE41-NEXT: psrld $1, %xmm1<br>
-; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm3 = [3435973837,2454267027,0,1374389535]<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: pmuludq %xmm2, %xmm4<br>
-; CHECK-SSE41-NEXT: pmuludq %xmm3, %xmm1<br>
-; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm4[2,3],xmm1[4,5],xmm4[6,7]<br>
+; CHECK-SSE41-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
+; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [3435973837,2454267027,0,1374389535]<br>
+; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]<br>
+; CHECK-SSE41-NEXT: pmuludq %xmm1, %xmm3<br>
+; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm2<br>
+; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]<br>
+; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]<br>
; CHECK-SSE41-NEXT: movdqa %xmm1, %xmm2<br>
; CHECK-SSE41-NEXT: psrld $5, %xmm2<br>
; CHECK-SSE41-NEXT: psrld $2, %xmm1<br>
@@ -1183,14 +1164,13 @@ define <4 x i32> @test_urem_odd_even_one<br>
; CHECK-AVX1-LABEL: test_urem_odd_even_one:<br>
; CHECK-AVX1: # %bb.0:<br>
; CHECK-AVX1-NEXT: vpsrld $1, %xmm0, %xmm1<br>
-; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [3435973837,2454267027,0,1374389535]<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vpmuludq %xmm4, %xmm2, %xmm2<br>
+; CHECK-AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
+; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [3435973837,2454267027,0,1374389535]<br>
+; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]<br>
; CHECK-AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm1<br>
-; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]<br>
+; CHECK-AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm2<br>
+; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]<br>
+; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]<br>
; CHECK-AVX1-NEXT: vpsrld $5, %xmm1, %xmm2<br>
; CHECK-AVX1-NEXT: vpsrld $2, %xmm1, %xmm1<br>
; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7]<br>
@@ -2180,27 +2160,25 @@ define <4 x i32> @test_urem_odd_allones_<br>
; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,2147483649,268435456,0]<br>
; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm2<br>
; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,3,2,3]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm4<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm4[1,3,2,3]<br>
-; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]<br>
-; CHECK-SSE2-NEXT: movdqa %xmm3, %xmm1<br>
-; CHECK-SSE2-NEXT: psrld $31, %xmm1<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
-; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm4 = [5,4294967295,16,1]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,1,3,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm5<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm5[0,2,2,3]<br>
-; CHECK-SSE2-NEXT: psrld $2, %xmm3<br>
-; CHECK-SSE2-NEXT: movaps %xmm0, %xmm5<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[3,0],xmm2[3,3]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,3],xmm5[2,0]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm4, %xmm3<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm3<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[1,3,2,3]<br>
; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]<br>
-; CHECK-SSE2-NEXT: psubd %xmm2, %xmm0<br>
+; CHECK-SSE2-NEXT: movdqa %xmm2, %xmm1<br>
+; CHECK-SSE2-NEXT: psrld $2, %xmm1<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],xmm2[2,1]<br>
+; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm3 = [5,4294967295,16,1]<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]<br>
+; CHECK-SSE2-NEXT: psrld $31, %xmm2<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm3<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]<br>
+; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]<br>
+; CHECK-SSE2-NEXT: psubd %xmm1, %xmm0<br>
; CHECK-SSE2-NEXT: pxor %xmm1, %xmm1<br>
; CHECK-SSE2-NEXT: pcmpeqd %xmm1, %xmm0<br>
; CHECK-SSE2-NEXT: psrld $31, %xmm0<br>
@@ -2297,20 +2275,18 @@ define <4 x i32> @test_urem_even_allones<br>
; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm4[1,3,2,3]<br>
; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]<br>
; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm2<br>
-; CHECK-SSE2-NEXT: psrld $31, %xmm2<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[3,3]<br>
+; CHECK-SSE2-NEXT: psrld $2, %xmm2<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,3],xmm1[2,1]<br>
; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm3 = [14,4294967295,16,1]<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,1,3,3]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm2, %xmm5<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm5[0,2,2,3]<br>
-; CHECK-SSE2-NEXT: psrld $2, %xmm1<br>
-; CHECK-SSE2-NEXT: movaps %xmm0, %xmm5<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[3,0],xmm4[3,3]<br>
-; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],xmm5[2,0]<br>
-; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
-; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]<br>
-; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]<br>
-; CHECK-SSE2-NEXT: psubd %xmm1, %xmm0<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm3, %xmm2<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]<br>
+; CHECK-SSE2-NEXT: psrld $31, %xmm1<br>
+; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]<br>
+; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm3<br>
+; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]<br>
+; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]<br>
+; CHECK-SSE2-NEXT: psubd %xmm2, %xmm0<br>
; CHECK-SSE2-NEXT: pxor %xmm1, %xmm1<br>
; CHECK-SSE2-NEXT: pcmpeqd %xmm1, %xmm0<br>
; CHECK-SSE2-NEXT: psrld $31, %xmm0<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll?rev=367100&r1=367099&r2=367100&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll?rev=367100&r1=367099&r2=367100&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/vector-reduce-mul-widen.ll Fri Jul 26 04:10:20 2019<br>
@@ -814,12 +814,8 @@ define i32 @test_v4i32(<4 x i32> %a0) {<br>
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,1,1]<br>
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm2, %xmm3<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
+; SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
; SSE2-NEXT: movd %xmm1, %eax<br>
; SSE2-NEXT: retq<br>
;<br>
@@ -856,23 +852,16 @@ define i32 @test_v4i32(<4 x i32> %a0) {<br>
define i32 @test_v8i32(<8 x i32> %a0) {<br>
; SSE2-LABEL: test_v8i32:<br>
; SSE2: # %bb.0:<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm2, %xmm3<br>
; SSE2-NEXT: pmuludq %xmm1, %xmm0<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm2, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm2<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,2,0,0]<br>
-; SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: movd %xmm1, %eax<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[2,2,0,0]<br>
+; SSE2-NEXT: pmuludq %xmm3, %xmm0<br>
+; SSE2-NEXT: pmuludq %xmm1, %xmm0<br>
+; SSE2-NEXT: movd %xmm0, %eax<br>
; SSE2-NEXT: retq<br>
;<br>
; SSE41-LABEL: test_v8i32:<br>
@@ -927,29 +916,22 @@ define i32 @test_v8i32(<8 x i32> %a0) {<br>
define i32 @test_v16i32(<16 x i32> %a0) {<br>
; SSE2-LABEL: test_v16i32:<br>
; SSE2: # %bb.0:<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm4, %xmm5<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm4, %xmm6<br>
-; SSE2-NEXT: pmuludq %xmm5, %xmm6<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm2, %xmm0<br>
; SSE2-NEXT: pmuludq %xmm1, %xmm0<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm6[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm4, %xmm1<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm5, %xmm2<br>
+; SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm6[2,2,0,0]<br>
-; SSE2-NEXT: pmuludq %xmm6, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: movd %xmm1, %eax<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,2,0,0]<br>
+; SSE2-NEXT: pmuludq %xmm2, %xmm0<br>
+; SSE2-NEXT: pmuludq %xmm1, %xmm0<br>
+; SSE2-NEXT: movd %xmm0, %eax<br>
; SSE2-NEXT: retq<br>
;<br>
; SSE41-LABEL: test_v16i32:<br>
@@ -1012,39 +994,32 @@ define i32 @test_v16i32(<16 x i32> %a0)<br>
define i32 @test_v32i32(<32 x i32> %a0) {<br>
; SSE2-LABEL: test_v32i32:<br>
; SSE2: # %bb.0:<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm2[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm6[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm2[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm8, %xmm9<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm4[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm0[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm8, %xmm10<br>
+; SSE2-NEXT: pmuludq %xmm9, %xmm10<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm3[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm8, %xmm9<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm5[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm1[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm8, %xmm11<br>
+; SSE2-NEXT: pmuludq %xmm9, %xmm11<br>
+; SSE2-NEXT: pmuludq %xmm10, %xmm11<br>
; SSE2-NEXT: pmuludq %xmm6, %xmm2<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm0[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm4, %xmm0<br>
; SSE2-NEXT: pmuludq %xmm2, %xmm0<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm7, %xmm3<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm1[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm5, %xmm1<br>
; SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm8, %xmm0<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm9, %xmm3<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm3<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm2, %xmm0<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm10, %xmm2<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm2<br>
-; SSE2-NEXT: pmuludq %xmm3, %xmm2<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[2,2,0,0]<br>
-; SSE2-NEXT: pmuludq %xmm2, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]<br>
+; SSE2-NEXT: pmuludq %xmm1, %xmm0<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm11[2,2,0,0]<br>
+; SSE2-NEXT: pmuludq %xmm11, %xmm1<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
; SSE2-NEXT: movd %xmm1, %eax<br>
; SSE2-NEXT: retq<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll?rev=367100&r1=367099&r2=367100&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll?rev=367100&r1=367099&r2=367100&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/vector-reduce-mul.ll Fri Jul 26 04:10:20 2019<br>
@@ -807,12 +807,8 @@ define i32 @test_v4i32(<4 x i32> %a0) {<br>
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,1,1]<br>
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm2, %xmm3<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
+; SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
; SSE2-NEXT: movd %xmm1, %eax<br>
; SSE2-NEXT: retq<br>
;<br>
@@ -849,23 +845,16 @@ define i32 @test_v4i32(<4 x i32> %a0) {<br>
define i32 @test_v8i32(<8 x i32> %a0) {<br>
; SSE2-LABEL: test_v8i32:<br>
; SSE2: # %bb.0:<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm2, %xmm3<br>
; SSE2-NEXT: pmuludq %xmm1, %xmm0<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm2, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm2<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,2,0,0]<br>
-; SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: movd %xmm1, %eax<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[2,2,0,0]<br>
+; SSE2-NEXT: pmuludq %xmm3, %xmm0<br>
+; SSE2-NEXT: pmuludq %xmm1, %xmm0<br>
+; SSE2-NEXT: movd %xmm0, %eax<br>
; SSE2-NEXT: retq<br>
;<br>
; SSE41-LABEL: test_v8i32:<br>
@@ -920,29 +909,22 @@ define i32 @test_v8i32(<8 x i32> %a0) {<br>
define i32 @test_v16i32(<16 x i32> %a0) {<br>
; SSE2-LABEL: test_v16i32:<br>
; SSE2: # %bb.0:<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm4, %xmm5<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm4, %xmm6<br>
-; SSE2-NEXT: pmuludq %xmm5, %xmm6<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm2, %xmm0<br>
; SSE2-NEXT: pmuludq %xmm1, %xmm0<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm6[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm4, %xmm1<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm5, %xmm2<br>
+; SSE2-NEXT: pmuludq %xmm1, %xmm2<br>
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm6[2,2,0,0]<br>
-; SSE2-NEXT: pmuludq %xmm6, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: movd %xmm1, %eax<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,2,0,0]<br>
+; SSE2-NEXT: pmuludq %xmm2, %xmm0<br>
+; SSE2-NEXT: pmuludq %xmm1, %xmm0<br>
+; SSE2-NEXT: movd %xmm0, %eax<br>
; SSE2-NEXT: retq<br>
;<br>
; SSE41-LABEL: test_v16i32:<br>
@@ -1005,39 +987,32 @@ define i32 @test_v16i32(<16 x i32> %a0)<br>
define i32 @test_v32i32(<32 x i32> %a0) {<br>
; SSE2-LABEL: test_v32i32:<br>
; SSE2: # %bb.0:<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm2[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm6[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm2[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm8, %xmm9<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm4[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm0[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm8, %xmm10<br>
+; SSE2-NEXT: pmuludq %xmm9, %xmm10<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm3[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm8, %xmm9<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm5[1,1,3,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm1[1,1,3,3]<br>
+; SSE2-NEXT: pmuludq %xmm8, %xmm11<br>
+; SSE2-NEXT: pmuludq %xmm9, %xmm11<br>
+; SSE2-NEXT: pmuludq %xmm10, %xmm11<br>
; SSE2-NEXT: pmuludq %xmm6, %xmm2<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm0[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm4, %xmm0<br>
; SSE2-NEXT: pmuludq %xmm2, %xmm0<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm7, %xmm3<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm1[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm5, %xmm1<br>
; SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm8, %xmm0<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm9, %xmm3<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm3<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm2, %xmm0<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3]<br>
-; SSE2-NEXT: pmuludq %xmm10, %xmm2<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm2<br>
-; SSE2-NEXT: pmuludq %xmm3, %xmm2<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[2,2,0,0]<br>
-; SSE2-NEXT: pmuludq %xmm2, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]<br>
+; SSE2-NEXT: pmuludq %xmm1, %xmm0<br>
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm11[2,2,0,0]<br>
+; SSE2-NEXT: pmuludq %xmm11, %xmm1<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
; SSE2-NEXT: movd %xmm1, %eax<br>
; SSE2-NEXT: retq<br>
@@ -1151,12 +1126,8 @@ define i16 @test_v4i16(<4 x i16> %a0) {<br>
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,1,1]<br>
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm2, %xmm3<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
+; SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
; SSE2-NEXT: pextrw $0, %xmm1, %eax<br>
; SSE2-NEXT: # kill: def $ax killed $ax killed $eax<br>
; SSE2-NEXT: retq<br>
@@ -1603,12 +1574,8 @@ define i8 @test_v4i8(<4 x i8> %a0) {<br>
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,3,1,1]<br>
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]<br>
; SSE2-NEXT: pmuludq %xmm2, %xmm3<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]<br>
-; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]<br>
-; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]<br>
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]<br>
; SSE2-NEXT: pmuludq %xmm0, %xmm1<br>
+; SSE2-NEXT: pmuludq %xmm3, %xmm1<br>
; SSE2-NEXT: movd %xmm1, %eax<br>
; SSE2-NEXT: # kill: def $al killed $al killed $eax<br>
; SSE2-NEXT: retq<br>
<br>
<br>
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</blockquote></div>