[PATCH] D64944: [GlobalISel][AArch64] Add support for base register + offset register loads

[Amara Emerson via Phabricator via llvm-commits]

aemerson accepted this revision.
aemerson added a comment.
This revision is now accepted and ready to land.

LGTM.



================
Comment at: llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp:3973
+  // If this is used more than once, let's not bother folding.
+  // TODO: Check if they are memory ops. If they are, then we can still fold
+  // without having to recompute anything.
----------------
For future improvements: we can use MachineInstr::mayLoad/mayStore to check the users, even if they've been selected to target instructions.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64944/new/

https://reviews.llvm.org/D64944