[PATCH] D62608: [ARM64, COFF] Add CodeView register mapping

[Reid Kleckner via Phabricator via llvm-commits]

rnk added a comment.

In D62608#1522123 <https://reviews.llvm.org/D62608#1522123>, @TomTan wrote:

> Yes, I was thinking on passing CPU arch (as you mentioned from S_COMPILE3) to get correct register name. I am trying to find a way in each include site of "CodeViewRegisters.def" to get that information. At the mean time, the current issue affects debugging experience on Chromium and derived projects. As register name query only affects LLVM pdb tools, could this change be merged at first while I am working on fixing LLVM pdb tool? Also ARM64 support for LLVM pdb tool is new, so it would not block anything or test.


The way I interpret LLVM's project policy is that new features and bug fixes should have tests, and with our testing infrastructure, that usually means starting with a dumper. Right now I'm working on missing inline line tables, and before I send the functionality for review and write tests for it, I've gone and improved the dumper in rL362037 <https://reviews.llvm.org/rL362037>.

A while back (rL312042 <https://reviews.llvm.org/rL312042>) I rebased an improvement to llvm-dwarfdump to do this kind of location pretty printing stuff, and when I did, I uncovered several of these kinds of tests where the dumper printed the hex bytes of a dwarf expression, and the test contained comments explaining that these bytes were correct. However, the comments were stale and the bytes were actually wrong, at some point someone updated them without interpreting the bytes and checking the comments. I'd like to avoid similar situations in the future. :)


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