[llvm] r359568 - [llvm-objcopy] Add RISC-V support for -B/-O
Jordan Rupprecht via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 30 08:21:36 PDT 2019
Author: rupprecht
Date: Tue Apr 30 08:21:36 2019
New Revision: 359568
URL: http://llvm.org/viewvc/llvm-project?rev=359568&view=rev
Log:
[llvm-objcopy] Add RISC-V support for -B/-O
Reviewers: jorgbrown, espindola, alexshap, jhenderson
Subscribers: emaste, arichardson, fedor.sergeev, jakehehrlich, kito-cheng, shiva0217, MaskRay, rogfer01, rkruppe, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61272
Modified:
llvm/trunk/test/tools/llvm-objcopy/ELF/binary-input-arch.test
llvm/trunk/test/tools/llvm-objcopy/ELF/cross-arch-headers.test
llvm/trunk/tools/llvm-objcopy/CopyConfig.cpp
Modified: llvm/trunk/test/tools/llvm-objcopy/ELF/binary-input-arch.test
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-objcopy/ELF/binary-input-arch.test?rev=359568&r1=359567&r2=359568&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-objcopy/ELF/binary-input-arch.test (original)
+++ llvm/trunk/test/tools/llvm-objcopy/ELF/binary-input-arch.test Tue Apr 30 08:21:36 2019
@@ -18,6 +18,12 @@
# RUN: llvm-objcopy -I binary -B powerpc:common64 %t.txt %t.powerpc_common64.o
# RUN: llvm-readobj --file-headers %t.powerpc_common64.o | FileCheck %s --check-prefixes=CHECK,LE,PPC,64
+# RUN: llvm-objcopy -I binary -B riscv:rv32 %t.txt %t.rv32.o
+# RUN: llvm-readobj --file-headers %t.rv32.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32
+
+# RUN: llvm-objcopy -I binary -B riscv:rv64 %t.txt %t.rv64.o
+# RUN: llvm-readobj --file-headers %t.rv64.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV64,64
+
# RUN: llvm-objcopy -I binary -B sparc %t.txt %t.sparc.o
# RUN: llvm-readobj --file-headers %t.sparc.o | FileCheck %s --check-prefixes=CHECK,LE,SPARC,32
@@ -25,19 +31,25 @@
# RUN: llvm-readobj --file-headers %t.x86-64.o | FileCheck %s --check-prefixes=CHECK,LE,X86-64,64
# CHECK: Format:
-# AARCH64-SAME: ELF64-aarch64-little
-# ARM-SAME: ELF32-arm-little
-# I386-SAME: ELF32-i386
-# MIPS-SAME: ELF32-mips{{$}}
-# PPC-SAME: ELF64-ppc64
-# SPARC-SAME: ELF32-sparc
-# X86-64-SAME: ELF64-x86-64
+# 32-SAME: ELF32-
+# 64-SAME: ELF64-
+# AARCH64-SAME: aarch64-little
+# ARM-SAME: arm-little
+# I386-SAME: i386
+# MIPS-SAME: mips{{$}}
+# RISCV32-SAME: riscv{{$}}
+# RISCV64-SAME: riscv{{$}}
+# PPC-SAME: ppc64
+# SPARC-SAME: sparc
+# X86-64-SAME: x86-64
# AARCH64-NEXT: Arch: aarch64
# ARM-NEXT: Arch: arm
# I386-NEXT: Arch: i386
# MIPS-NEXT: Arch: mips{{$$}}
# PPC-NEXT: Arch: powerpc64le
+# RISCV32-NEXT: Arch: riscv32
+# RISCV64-NEXT: Arch: riscv64
# SPARC-NEXT: Arch: sparcel
# X86-64-NEXT: Arch: x86_64
@@ -62,6 +74,8 @@
# I386-NEXT: Machine: EM_386 (0x3)
# MIPS-NEXT: Machine: EM_MIPS (0x8)
# PPC-NEXT: Machine: EM_PPC64 (0x15)
+# RISCV32-NEXT: Machine: EM_RISCV (0xF3)
+# RISCV64-NEXT: Machine: EM_RISCV (0xF3)
# SPARC-NEXT: Machine: EM_SPARC (0x2)
# X86-64-NEXT: Machine: EM_X86_64 (0x3E)
# CHECK-NEXT: Version: 1
Modified: llvm/trunk/test/tools/llvm-objcopy/ELF/cross-arch-headers.test
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-objcopy/ELF/cross-arch-headers.test?rev=359568&r1=359567&r2=359568&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-objcopy/ELF/cross-arch-headers.test (original)
+++ llvm/trunk/test/tools/llvm-objcopy/ELF/cross-arch-headers.test Tue Apr 30 08:21:36 2019
@@ -53,6 +53,14 @@
# RUN: llvm-readobj --file-headers %t.elf64_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64LE,64,SYSV
# RUN: llvm-readobj --file-headers %t.elf64_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC64LE,64,SYSV
+# RUN: llvm-objcopy %t.o -O elf32-littleriscv %t.elf32_littleriscv.o --split-dwo=%t.elf32_littleriscv.dwo
+# RUN: llvm-readobj --file-headers %t.elf32_littleriscv.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32,SYSV
+# RUN: llvm-readobj --file-headers %t.elf32_littleriscv.dwo | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32,SYSV
+
+# RUN: llvm-objcopy %t.o -O elf64-littleriscv %t.elf64_littleriscv.o --split-dwo=%t.elf64_littleriscv.dwo
+# RUN: llvm-readobj --file-headers %t.elf64_littleriscv.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV64,64,SYSV
+# RUN: llvm-readobj --file-headers %t.elf64_littleriscv.dwo | FileCheck %s --check-prefixes=CHECK,LE,RISCV64,64,SYSV
+
# RUN: llvm-objcopy %t.o -O elf64-x86-64 %t.elf64_x86_64.o --split-dwo=%t.elf64_x86_64.dwo
# RUN: llvm-readobj --file-headers %t.elf64_x86_64.o | FileCheck %s --check-prefixes=CHECK,LE,X86-64,64,SYSV
# RUN: llvm-readobj --file-headers %t.elf64_x86_64.dwo | FileCheck %s --check-prefixes=CHECK,LE,X86-64,64,SYSV
@@ -127,6 +135,8 @@ Symbols:
# PPC-SAME: ppc{{$}}
# PPC64BE-SAME: ppc64{{$}}
# PPC64LE-SAME: ppc64{{$}}
+# RISCV32-SAME: riscv{{$}}
+# RISCV64-SAME: riscv{{$}}
# X86-64-SAME: x86-64
# DEFAULT-SAME: unknown
@@ -141,6 +151,8 @@ Symbols:
# PPC-NEXT: Arch: powerpc{{$}}
# PPC64BE-NEXT: Arch: powerpc64{{$}}
# PPC64LE-NEXT: Arch: powerpc64le
+# RISCV32-NEXT: Arch: riscv32
+# RISCV64-NEXT: Arch: riscv64
# X86-64-NEXT: Arch: x86_64
# DEFAULT-NEXT: Arch: unknown
@@ -156,14 +168,16 @@ Symbols:
# FREEBSD: OS/ABI: FreeBSD (0x9)
# DEFAULT: OS/ABI: Standalone (0xFF)
-# AARCH: Machine: EM_AARCH64 (0xB7)
-# ARM: Machine: EM_ARM (0x28)
-# I386: Machine: EM_386 (0x3)
-# IAMCU: Machine: EM_IAMCU (0x6)
-# MIPS: Machine: EM_MIPS (0x8)
-# PPC: Machine: EM_PPC (0x14)
-# PPC64: Machine: EM_PPC64 (0x15)
-# X86-64: Machine: EM_X86_64 (0x3E)
+# AARCH: Machine: EM_AARCH64 (0xB7)
+# ARM: Machine: EM_ARM (0x28)
+# I386: Machine: EM_386 (0x3)
+# IAMCU: Machine: EM_IAMCU (0x6)
+# MIPS: Machine: EM_MIPS (0x8)
+# PPC: Machine: EM_PPC (0x14)
+# PPC64: Machine: EM_PPC64 (0x15)
+# RISCV32: Machine: EM_RISCV (0xF3)
+# RISCV64: Machine: EM_RISCV (0xF3)
+# X86-64: Machine: EM_X86_64 (0x3E)
# 32: HeaderSize: 52
# 64: HeaderSize: 64
Modified: llvm/trunk/tools/llvm-objcopy/CopyConfig.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objcopy/CopyConfig.cpp?rev=359568&r1=359567&r2=359568&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-objcopy/CopyConfig.cpp (original)
+++ llvm/trunk/tools/llvm-objcopy/CopyConfig.cpp Tue Apr 30 08:21:36 2019
@@ -260,6 +260,8 @@ static const StringMap<MachineInfo> Arch
{"i386:x86-64", {ELF::EM_X86_64, true, true}},
{"mips", {ELF::EM_MIPS, false, false}},
{"powerpc:common64", {ELF::EM_PPC64, true, true}},
+ {"riscv:rv32", {ELF::EM_RISCV, false, true}},
+ {"riscv:rv64", {ELF::EM_RISCV, true, true}},
{"sparc", {ELF::EM_SPARC, false, true}},
{"x86-64", {ELF::EM_X86_64, true, true}},
};
@@ -275,22 +277,31 @@ static Expected<const MachineInfo &> get
// FIXME: consolidate with the bfd parsing used by lld.
static const StringMap<MachineInfo> OutputFormatMap{
// Name, {EMachine, 64bit, LittleEndian}
+ // x86
{"elf32-i386", {ELF::EM_386, false, true}},
+ {"elf32-x86-64", {ELF::EM_X86_64, false, true}},
+ {"elf64-x86-64", {ELF::EM_X86_64, true, true}},
+ // Intel MCU
{"elf32-iamcu", {ELF::EM_IAMCU, false, true}},
+ // ARM
{"elf32-littlearm", {ELF::EM_ARM, false, true}},
- {"elf32-x86-64", {ELF::EM_X86_64, false, true}},
+ // ARM AArch64
{"elf64-aarch64", {ELF::EM_AARCH64, true, true}},
{"elf64-littleaarch64", {ELF::EM_AARCH64, true, true}},
+ // RISC-V
+ {"elf32-littleriscv", {ELF::EM_RISCV, false, true}},
+ {"elf64-littleriscv", {ELF::EM_RISCV, true, true}},
+ // PowerPC
{"elf32-powerpc", {ELF::EM_PPC, false, false}},
{"elf32-powerpcle", {ELF::EM_PPC, false, true}},
{"elf64-powerpc", {ELF::EM_PPC64, true, false}},
{"elf64-powerpcle", {ELF::EM_PPC64, true, true}},
- {"elf64-x86-64", {ELF::EM_X86_64, true, true}},
- {"elf32-tradbigmips", {ELF::EM_MIPS, false, false}},
+ // MIPS
{"elf32-bigmips", {ELF::EM_MIPS, false, false}},
{"elf32-ntradbigmips", {ELF::EM_MIPS, false, false}},
- {"elf32-tradlittlemips", {ELF::EM_MIPS, false, true}},
{"elf32-ntradlittlemips", {ELF::EM_MIPS, false, true}},
+ {"elf32-tradbigmips", {ELF::EM_MIPS, false, false}},
+ {"elf32-tradlittlemips", {ELF::EM_MIPS, false, true}},
{"elf64-tradbigmips", {ELF::EM_MIPS, true, false}},
{"elf64-tradlittlemips", {ELF::EM_MIPS, true, true}},
};
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