[PATCH] D60705: [ARM] Turn some undefined encoding bits into mandatory 1s.

[Eli Friedman via Phabricator via llvm-commits]

efriedma requested changes to this revision.
efriedma added a comment.
This revision now requires changes to proceed.

The use of "?" here doesn't seem right.  All those instructions where you're adding a "?" do in fact require that the bit in question must be zero.

We should also be using the "Unpredictable" field on these instructions so that we soft-fail in the disassembler.  This shouldn't conflict with the v8.1-M instructions, I think?  If it does, you can comment it out and leave a FIXME.

Please make sure we have tests in test/MC/Disassembler/ for all these encodings.


Repository:
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  https://reviews.llvm.org/D60705/new/

https://reviews.llvm.org/D60705