[PATCH] D60341: [X86] Use (SUBREG_TO_REG (MOV32rm)) for extloadi64i8/extloadi64i16 when the load is 4 byte aligned or better and not volatile.

[Phabricator via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL357875: [X86] Use (SUBREG_TO_REG (MOV32rm)) for extloadi64i8/extloadi64i16 when the… (authored by ctopper, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D60341?vs=193973&id=194070#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60341/new/

https://reviews.llvm.org/D60341

Files:
  llvm/trunk/lib/Target/X86/X86InstrCompiler.td
  llvm/trunk/lib/Target/X86/X86InstrInfo.td
  llvm/trunk/test/CodeGen/X86/fp128-cast.ll
  llvm/trunk/test/CodeGen/X86/vector-sext-widen.ll
  llvm/trunk/test/CodeGen/X86/vector-sext.ll
  llvm/trunk/test/CodeGen/X86/zext-logicop-shift-load.ll

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