[PATCH] D59535: [SelectionDAG] Compute known bits of CopyFromReg

Piotr Sobczak via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 19 02:30:34 PDT 2019


piotr marked an inline comment as done.
piotr added inline comments.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:19513
 
-  // If the operand types disagree, extend the shift amount to match.  Since
-  // BT ignores high bits (like shifts) we can use anyextend.
-  if (Src.getValueType() != BitNo.getValueType())
+  // If the operand types disagree, extend or truncate the shift amount to match.
+  // Since BT ignores high bits (like shifts) we can use anyextend for the extension.
----------------
lebedev.ri wrote:
> Does it trigger any tests without the rest of the diff?
> Does this *have* to be in the same diff as the other part of the diff?
The change in X86ISelLowering.cpp, when applied on its own, does not trigger on any of the existing tests. However, when applying the rest of the diff, without the change in X86ISelLowering.cpp, there are two assertions thrown in CodeGen/X86/early-ifcvt.ll and CodeGen/X86/switch.ll. 

Therefore I think the rest of the diff is necessary to trigger the new condition that is handled here.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59535/new/

https://reviews.llvm.org/D59535





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