[PATCH] D58903: [AMDGPU] Added v5i32 and v5f32 register classes

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SIRegisterInfo.td:584
+  let CopyCost = 5;
+  let AllocationPriority = 5;
+}
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Allocation priorities probably need to be shifted around again so it's ordered <all SGPRs in decreasing size, all VGPRs in decreasing size>


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58903/new/

https://reviews.llvm.org/D58903