[llvm] r355069 - [SelectionDAG] Strengthen assertions about usage of AtomicSDNodes

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 27 20:07:23 PST 2019


Author: reames
Date: Wed Feb 27 20:07:23 2019
New Revision: 355069

URL: http://llvm.org/viewvc/llvm-project?rev=355069&view=rev
Log:
[SelectionDAG] Strengthen assertions about usage of AtomicSDNodes

In D57601, I described the expectations around usage of AtomicSDNode and LoadSDNode/StoreSDNode w.r.t. atomic and volatiles. This patch simply embeds those expectations in assertions so that they can't be accidentally weakened.

Note: The reason only AtomicSDNodes of ATOMIC_LOAD and ATOMIC_STORE opcode are currently checked is that AMDGPU has an intrinsic which gets lowered to an ATOMIC_LOAD_FADD w/o a corresponding atomic MMO. This is suspicious, and I've brought it to the attention of the relevant developers. Once resolved, I'll strengthen that assertion.

Note 2: If this breaks your out-of-tree backend, go read the update instructions associated w/the previously mentioned patch. This will assert on (a subset of) things you need to update per those instructions.

Differential Revision: https://reviews.llvm.org/D58738


Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=355069&r1=355068&r2=355069&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Feb 27 20:07:23 2019
@@ -1385,7 +1385,10 @@ class AtomicSDNode : public MemSDNode {
 public:
   AtomicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTL,
                EVT MemVT, MachineMemOperand *MMO)
-      : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {}
+    : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
+    assert(((Opc != ISD::ATOMIC_LOAD && Opc != ISD::ATOMIC_STORE) ||
+            MMO->isAtomic()) && "then why are we using an AtomicSDNode?");
+  }
 
   const SDValue &getBasePtr() const { return getOperand(1); }
   const SDValue &getVal() const { return getOperand(2); }
@@ -2138,6 +2141,8 @@ public:
       : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
     LSBaseSDNodeBits.AddressingMode = AM;
     assert(getAddressingMode() == AM && "Value truncated");
+    assert((!MMO->isAtomic() || MMO->isVolatile()) &&
+           "use an AtomicSDNode instead for non-volatile atomics");
   }
 
   const SDValue &getOffset() const {




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