[PATCH] D57044: [AArch64] OOptimize floating point materialization

[Adhemerval Zanella via Phabricator via llvm-commits]

zatrazz marked 2 inline comments as done.
zatrazz added inline comments.


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Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:5446
+  // If we can not materialize in immediate field for fmov, check if the
+  // value can be encoded as the immediate operanf of a logical instruction.
+  if (!IsLegal && IsVTLegal)
----------------
efriedma wrote:
> "operanf"
Fixed locally.


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:5451
+              AArch64_AM::isLogicalImmediate(ImmInt.getZExtValue(),
+                                             VT.getSizeInBits());
 
----------------
efriedma wrote:
> I have no idea what isLogicalImmediate does if the RegSize is 16.
My understanding it should be safe since fmov transfer for float16 will be done from 32 bit register.


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  https://reviews.llvm.org/D57044/new/

https://reviews.llvm.org/D57044