[PATCH] D57056: [MC][X86] Correctly model additional operand latency caused by transfer delays from the integer to the floating point unit.

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb marked an inline comment as done.
andreadb added inline comments.


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Comment at: lib/Target/X86/X86Schedule.td:20
 
+def ReadInt2Fpu : SchedRead;
+
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RKSimon wrote:
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  https://reviews.llvm.org/D57056/new/

https://reviews.llvm.org/D57056