[PATCH] D56454: AMDGPU: Adjust the chain for loads writing to the HI part of a register.

Changpeng Fang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 16 13:23:42 PST 2019


cfang marked 4 inline comments as done.
cfang added inline comments.


================
Comment at: test/CodeGen/AMDGPU/chain-hi-to-lo.ll:1
+; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s
+
----------------
rampitec wrote:
> Could you use -check-prefix=GCN ?
sure, thanks.


================
Comment at: test/CodeGen/AMDGPU/chain-hi-to-lo.ll:132
+; CHECK-NEXT: flat_load_short_d16_hi [[DST]], v{{\[[0-9]+:[0-9]+\]}}
+define <2 x half> @chain_hi_to_lo_flat_different_bases(half addrspace(0)* %base_lo, half addrspace(0)* %base_hi) {
+bb:
----------------
rampitec wrote:
> addrspace(0) is not needed.
will remove it. Thanks.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56454/new/

https://reviews.llvm.org/D56454





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