[PATCH] D56454: AMDGPU: Adjust the chain for loads writing to the HI part of a register.

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: test/CodeGen/AMDGPU/chain-hi-to-lo.ll:1
+; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s
+
----------------
Could you use -check-prefix=GCN ?


================
Comment at: test/CodeGen/AMDGPU/chain-hi-to-lo.ll:132
+; CHECK-NEXT: flat_load_short_d16_hi [[DST]], v{{\[[0-9]+:[0-9]+\]}}
+define <2 x half> @chain_hi_to_lo_flat_different_bases(half addrspace(0)* %base_lo, half addrspace(0)* %base_hi) {
+bb:
----------------
addrspace(0) is not needed.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56454/new/

https://reviews.llvm.org/D56454