[PATCH] D56201: [LegalizeVectorTypes] Allow single loads and stores for more short vectors

[Jan Vesely via Phabricator via llvm-commits]

jvesely added a comment.

In D56201#1356228 <https://reviews.llvm.org/D56201#1356228>, @tauril wrote:

> I modified some AMDGPU tests to track more registers where possible as @jvesely suggested, and I added some missing new relevant generated instructions (`BFE_INT`).


thanks. the r600 test changes LGTM.
I can't comment on the x86 ones.


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