[PATCH] D53906: [ARM][AArch64] Increase TLS alignment to reserve space for Android's TCB

[Ryan Prichard via Phabricator via llvm-commits]

rprichard updated this revision to Diff 180755.
rprichard added a comment.

Add an explanation of how overaligning the executable TLS segment reserves the extra space Android needs for its TCB slots.

I think this helps clarify why the Config->Shared case doesn't do the overalignment? lld could overalign solibs, but it wouldn't be necessary, and it would create more alignment padding, wasting TLS memory.


Repository:
  rLLD LLVM Linker

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D53906/new/

https://reviews.llvm.org/D53906

Files:
  ELF/InputSection.cpp
  ELF/Writer.cpp
  test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
  test/ELF/aarch64-tls-gdle.s
  test/ELF/aarch64-tls-iele.s
  test/ELF/aarch64-tls-le.s
  test/ELF/aarch64-tlsld-ldst.s
  test/ELF/arm-tls-le32.s
  test/ELF/arm-tls-norelax-ie-le.s

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