[PATCH] D54714: [AMDGPU] Add and update scalar instructions

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:4533-4535
+                      MRI.getRegClass(Src0.getReg()) == &AMDGPU::SGPR_32RegClass;
+    bool Src1IsSGPR = Src1.isReg() && 
+                      MRI.getRegClass(Src1.getReg()) == &AMDGPU::SGPR_32RegClass;
----------------
You shouldn't check the literal class and use one of the isSGPR* functions in SIRegisterInfo


================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:4538-4539
+    MachineInstr *Xor = nullptr;
+    unsigned Temp = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);
+    unsigned NewDest = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);
+
----------------
Should probably use SReg_32_XEXEC


================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:4585-4586
+
+  unsigned NewDest = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);
+  unsigned Interm = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);
+
----------------
Ditto


Repository:
  rL LLVM

https://reviews.llvm.org/D54714