[PATCH] D54218: [MachineScheduler] Bias physical register immediate assignments

[Nirav Dave via Phabricator via llvm-commits]

niravd updated this revision to Diff 173403.
niravd marked an inline comment as done.
niravd edited the summary of this revision.
niravd added a comment.

Modify move immediate check to check all register definitions are physical. Also fix typo (s/isReg/getReg) that caused all register immediate assignments to be reordered. 
This appears to have resolved the isntance of PR26810 in CodeGen/X86/hoist-spill.ll, but otherwise doesn't seem to have an notable effect on code generation.


Repository:
  rL LLVM

https://reviews.llvm.org/D54218

Files:
  llvm/include/llvm/CodeGen/MachineScheduler.h
  llvm/lib/CodeGen/MachineScheduler.cpp
  llvm/lib/Target/X86/X86InstrCompiler.td
  llvm/lib/Target/X86/X86InstrInfo.td
  llvm/test/CodeGen/AArch64/machine_cse_impdef_killflags.ll
  llvm/test/CodeGen/AMDGPU/add.v2i16.ll
  llvm/test/CodeGen/AMDGPU/addrspacecast.ll
  llvm/test/CodeGen/AMDGPU/bswap.ll
  llvm/test/CodeGen/AMDGPU/call-argument-types.ll
  llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs.ll
  llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
  llvm/test/CodeGen/AMDGPU/ctpop64.ll
  llvm/test/CodeGen/AMDGPU/ds_write2.ll
  llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
  llvm/test/CodeGen/AMDGPU/fabs.f16.ll
  llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
  llvm/test/CodeGen/AMDGPU/fneg-combines.ll
  llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
  llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
  llvm/test/CodeGen/AMDGPU/function-returns.ll
  llvm/test/CodeGen/AMDGPU/global_smrd.ll
  llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
  llvm/test/CodeGen/AMDGPU/immv216.ll
  llvm/test/CodeGen/AMDGPU/infinite-loop.ll
  llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
  llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
  llvm/test/CodeGen/AMDGPU/kernel-args.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
  llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
  llvm/test/CodeGen/AMDGPU/llvm.round.ll
  llvm/test/CodeGen/AMDGPU/local-atomics64.ll
  llvm/test/CodeGen/AMDGPU/madak.ll
  llvm/test/CodeGen/AMDGPU/merge-store-crash.ll
  llvm/test/CodeGen/AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll
  llvm/test/CodeGen/AMDGPU/mul_int24.ll
  llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
  llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
  llvm/test/CodeGen/AMDGPU/or.ll
  llvm/test/CodeGen/AMDGPU/permute.ll
  llvm/test/CodeGen/AMDGPU/ret.ll
  llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
  llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
  llvm/test/CodeGen/AMDGPU/select-i1.ll
  llvm/test/CodeGen/AMDGPU/setcc-opt.ll
  llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
  llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
  llvm/test/CodeGen/AMDGPU/sign_extend.ll
  llvm/test/CodeGen/AMDGPU/sub.i16.ll
  llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll
  llvm/test/CodeGen/ARM/misched-fusion-lit.ll
  llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
  llvm/test/CodeGen/PowerPC/indirectbr.ll
  llvm/test/CodeGen/PowerPC/licm-remat.ll
  llvm/test/CodeGen/PowerPC/pr35688.ll
  llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
  llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
  llvm/test/CodeGen/X86/abi-isel.ll
  llvm/test/CodeGen/X86/anyext.ll
  llvm/test/CodeGen/X86/atomic-eflags-reuse.ll
  llvm/test/CodeGen/X86/atomic-minmax-i6432.ll
  llvm/test/CodeGen/X86/atomic_mi.ll
  llvm/test/CodeGen/X86/avx-cmp.ll
  llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
  llvm/test/CodeGen/X86/bss_pagealigned.ll
  llvm/test/CodeGen/X86/bypass-slow-division-32.ll
  llvm/test/CodeGen/X86/bypass-slow-division-64.ll
  llvm/test/CodeGen/X86/clz.ll
  llvm/test/CodeGen/X86/cmpxchg-i128-i1.ll
  llvm/test/CodeGen/X86/cmpxchg16b.ll
  llvm/test/CodeGen/X86/code-model-elf-memset.ll
  llvm/test/CodeGen/X86/combine-srem.ll
  llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
  llvm/test/CodeGen/X86/divrem.ll
  llvm/test/CodeGen/X86/instr-symbols.mir
  llvm/test/CodeGen/X86/known-bits.ll
  llvm/test/CodeGen/X86/machine-cse.ll
  llvm/test/CodeGen/X86/memset-nonzero.ll
  llvm/test/CodeGen/X86/misched-code-difference-with-debug.ll
  llvm/test/CodeGen/X86/patchpoint.ll
  llvm/test/CodeGen/X86/pr32282.ll
  llvm/test/CodeGen/X86/pr36865.ll
  llvm/test/CodeGen/X86/pr38865.ll
  llvm/test/CodeGen/X86/pr39391.ll
  llvm/test/CodeGen/X86/pr9517.ll
  llvm/test/CodeGen/X86/scalar_widen_div.ll
  llvm/test/CodeGen/X86/shrink_vmul.ll
  llvm/test/CodeGen/X86/speculative-load-hardening-call-and-ret.ll
  llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll
  llvm/test/CodeGen/X86/speculative-load-hardening.ll
  llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll
  llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
  llvm/test/CodeGen/X86/vector-rem.ll
  llvm/test/CodeGen/X86/x86-cmov-converter.ll
  llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
  llvm/test/DebugInfo/X86/live-debug-values.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D54218.173403.patch
Type: text/x-patch
Size: 383702 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20181109/73b07d05/attachment-0001.bin>