[PATCH] D54192: [ARM] Fix CPSR liveness in tMOVCCr_pseudo lowering.

[Eli Friedman via Phabricator via llvm-commits]

efriedma created this revision.
efriedma added reviewers: dmgreen, SjoerdMeijer, olista01, t.p.northover.
Herald added subscribers: chrib, kristof.beyls, javed.absar.

The lowering was missing live-ins in certain cases, like a sequence of multiple tMOVCCr_pseudo instructions.  This would lead to a verifier failure, and on pre-v6 Thumb CPSR would be incorrectly clobbered.

For reasons I don't completely understand, it's hard to get a sequence of multiple tMOVCCr_pseudo instructions; the issue only seems to show up with 64-bit comparisons where the result is zero-extended.  I added some extra testcases in case that changes in the future.  Probably some optimization opportunities here if anyone is interested.  (`@test_slt_not` is the case that was getting miscompiled.)

The code to check the liveness of CPSR was stolen from X86ISelLowering.cpp; maybe it could be refactored into common helper, but I have no idea where to put it.


Repository:
  rL LLVM

https://reviews.llvm.org/D54192

Files:
  lib/Target/ARM/ARMISelLowering.cpp
  test/CodeGen/ARM/wide-compares.ll
  test/CodeGen/Thumb/select.ll

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