[PATCH] D53160: AMDGPU: Avoid selecting ds_{read,write}2_b32 on SI

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle added inline comments.


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:6711
+    if (Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS &&
+        NumElements == 2 && VT.getStoreSize() == 8 &&
+        Store->getAlignment() < 8) {
----------------
arsenm wrote:
> NumElements == 2 is redundant and possibly wrong?
I don't know. We shouldn't have unaligned i64 loads at this point, I guess, but the check does ensure that we're really dealing with a vector load. And NumElements > 2 is dealt with above.


Repository:
  rL LLVM

https://reviews.llvm.org/D53160