[PATCH] D53160: AMDGPU: Avoid selecting ds_{read,write}2_b32 on SI

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle updated this revision to Diff 169870.
nhaehnle added a comment.

Right, I looked at SelectDS64Bit4ByteAligned, but doing the split there
requires more code and also seems wrong since it'd mean inserting
additional nodes fairly late without giving them a chance to be combined
(not that they'd be combined very often, but still).

In a sense, splitting the vectorized load is a form of legalization.

Anyway, removing the FIXME comment.


Repository:
  rL LLVM

https://reviews.llvm.org/D53160

Files:
  lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  lib/Target/AMDGPU/SIISelLowering.cpp
  test/CodeGen/AMDGPU/lds-bounds.ll

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