[PATCH] D53126: [X86] Restore X86ISelDAGToDAG::matchBEXTRFromAnd. Teach address matching to create a BEXTR pattern from a (shl (and X, mask >> C1) if C1 can be folded into addressing mode.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 10 23:20:34 PDT 2018


craig.topper created this revision.
craig.topper added reviewers: lebedev.ri, RKSimon, spatel.

This is an alternative to https://reviews.llvm.org/D53080 since I think using a BEXTR for a shifted mask is definitely an improvement when the shl can be absorbed into addressing mode. The other cases I'm less sure about.

We already have several tricks for handling an and of a shift in address matching. This adds a new case for BEXTR.

I've moved the BEXTR matching code back to X86ISelDAGToDAG to allow it to match. I suppose alternatively we could directly emit a X86ISD::BEXTR node that isel could pattern match. But I'm trying to view BEXTR matching as an isel concern so DAG combine can see 'and' and 'shift' operations that are well understood. We did lose a couple cases from tbm_patterns.ll, but I think there are ways to recover that.

I've also put back the manual load folding code in matchBEXTRFromAnd that I removed a few months ago in r324939. This gives us some more freedom to make decisions based on the ability to fold a load. I haven't done anything with that yet.


Repository:
  rL LLVM

https://reviews.llvm.org/D53126

Files:
  lib/Target/X86/X86ISelDAGToDAG.cpp
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86InstrCompiler.td
  test/CodeGen/X86/extract-bits.ll
  test/CodeGen/X86/tbm_patterns.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D53126.169153.patch
Type: text/x-patch
Size: 15465 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20181011/dabd85a6/attachment.bin>


More information about the llvm-commits mailing list