[PATCH] D48131: [RISCV] Implement codegen for cmpxchg on RV32I

Roger Ferrer Ibanez via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 3 06:35:51 PDT 2018


rogfer01 added inline comments.


================
Comment at: lib/Target/RISCV/RISCVISelLowering.cpp:1705
+  Function *MaskedCmpXchg = Intrinsic::getDeclaration(
+      CI->getModule(), Intrinsic::riscv_masked_cmpxchg_i32, Tys);
+  return Builder.CreateCall(MaskedCmpXchg,
----------------
@asb, I have a minor question here:

At some point we will want to implement this for rv64a. I presume that for rv64a we still want to have `setMinCmpXchgSizeInBits(32)` so the `i32` and the `i64` cases are handled in `RISCVExpandPseudoInsts.cpp` as non-masked lr/sc loops. Currently `AtomicExpand.cpp` will choose to use the smaller size supported (`i32`) and the intrinsic here will be using `i32` values. This will require some form of legalisation in 64-bit, won't it? Will we end custom legalising this intrinsic call for the 64-bit case to a `riscv_masked_cmpxchg_i64`? Or perhaps there is a neater way to achieve this?

Thanks!


https://reviews.llvm.org/D48131





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