[PATCH] D50965: [PowerPC] Fix label address calculation for ppc64

[Strahinja Petrovic via Phabricator via llvm-commits]

spetrovic updated this revision to Diff 162867.
spetrovic added a comment.

Comments Addressed. Thanks for the review.


Repository:
  rL LLVM

https://reviews.llvm.org/D50965

Files:
  lib/Target/PowerPC/PPCISelLowering.cpp
  test/CodeGen/PowerPC/ppc-label2.ll


Index: test/CodeGen/PowerPC/ppc-label2.ll
===================================================================
--- test/CodeGen/PowerPC/ppc-label2.ll
+++ test/CodeGen/PowerPC/ppc-label2.ll
@@ -0,0 +1,21 @@
+; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -ppc-asm-full-reg-names -relocation-model=pic | FileCheck --check-prefix=CHECK-PIC32 %s
+; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -ppc-asm-full-reg-names -relocation-model=static | FileCheck --check-prefix=CHECK-STATIC32 %s
+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -ppc-asm-full-reg-names -relocation-model=pic | FileCheck --check-prefix=CHECK-PPC64 %s
+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -ppc-asm-full-reg-names -relocation-model=static | FileCheck --check-prefix=CHECK-PPC64 %s
+
+
+define dso_local i64 @foo() {
+entry:
+  br label %__here
+
+__here:                                           ; preds = %entry
+  ret i64 ptrtoint (i8* blockaddress(@foo, %__here) to i64)
+}
+
+; CHECK-PIC32:           lwz {{r[0-9]+}}, .LC0-.LTOC(r30)
+; CHECK-PIC32-NOT:       li {{r[0-9]+}}, .Ltmp1-.L1$pb at l
+; CHECK-PIC32-NOT:       addis 4, 30, .Ltmp1-.L1$pb at ha
+; CHECK-STATIC32:        li {{r[0-9]+}}, .Ltmp0 at l
+; CHECK-STATIC32-NEXT:   addis {{r[0-9]+}}, {{r[0-9]+}}, .Ltmp0 at ha
+; CHECK-PPC64:           addis   r3, r2, .LC0 at toc@ha
+; CHECK-PPC64-NEXT:      ld r3, .LC0 at toc@l(r3)
\ No newline at end of file
Index: lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- lib/Target/PowerPC/PPCISelLowering.cpp
+++ lib/Target/PowerPC/PPCISelLowering.cpp
@@ -2704,7 +2704,8 @@
 
   // 64-bit SVR4 ABI code is always position-independent.
   // The actual BlockAddress is stored in the TOC.
-  if (Subtarget.isSVR4ABI() && isPositionIndependent()) {
+  if (Subtarget.isSVR4ABI() &&
+      (Subtarget.isPPC64() || isPositionIndependent())) {
     if (Subtarget.isPPC64())
       setUsesTOCBasePtr(DAG);
     SDValue GA = DAG.getTargetBlockAddress(BA, PtrVT, BASDN->getOffset());


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