[llvm] r335315 - AMDGPU/GlobalISel: Implement select() for COPY

Tom Stellard via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 21 17:44:29 PDT 2018


Author: tstellar
Date: Thu Jun 21 17:44:29 2018
New Revision: 335315

URL: http://llvm.org/viewvc/llvm-project?rev=335315&view=rev
Log:
AMDGPU/GlobalISel: Implement select() for COPY

Reviewers: arsenm, nhaehnle

Reviewed By: nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D46151

Added:
    llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp?rev=335315&r1=335314&r2=335315&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp Thu Jun 21 17:44:29 2018
@@ -528,8 +528,11 @@ bool AMDGPUInstructionSelector::selectG_
 bool AMDGPUInstructionSelector::select(MachineInstr &I,
                                        CodeGenCoverage &CoverageInfo) const {
 
-  if (!isPreISelGenericOpcode(I.getOpcode()))
+  if (!isPreISelGenericOpcode(I.getOpcode())) {
+    if (I.isCopy())
+      return selectCOPY(I);
     return true;
+  }
 
   switch (I.getOpcode()) {
   default:

Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir?rev=335315&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir Thu Jun 21 17:44:29 2018
@@ -0,0 +1,27 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN
+
+--- |
+  define amdgpu_kernel void @copy(i32 addrspace(1)* %global0) {ret void}
+...
+---
+
+name:            copy
+legalized:       true
+regBankSelected: true
+
+
+body: |
+  bb.0:
+    liveins: $sgpr2_sgpr3
+    ; GCN-LABEL: name: copy
+    ; GCN: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr2_sgpr3
+    ; GCN: [[COPY1:%[0-9]+]]:vreg_64 = COPY [[COPY]]
+    ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
+    ; GCN: FLAT_STORE_DWORD [[COPY1]], [[DEF]], 0, 0, 0, implicit $exec, implicit $flat_scr
+    %0:sgpr(s64) = COPY $sgpr2_sgpr3
+    %1:vgpr(s64) = COPY %0
+    %2:vgpr(s32) = G_IMPLICIT_DEF
+    G_STORE %2, %1 :: (store 4 into %ir.global0)
+...
+---




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