[PATCH] D46837: [MachineScheduler] Skip an implicit def of a super-reg added by regalloc in findDefIdx.

[mattias.v.eriksson@ericsson.com via Phabricator via llvm-commits]

materi added inline comments.


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Comment at: lib/CodeGen/TargetSchedule.cpp:158
+/// with respect to each other.  We need to skip implicit def operands (added
+/// by regalloc) that are not part of the MCInstrDesc.
 static unsigned findDefIdx(const MachineInstr *MI, unsigned DefOperIdx) {
----------------
"We need to skip..." looks strange to me.

I would prefer if an implicit operand means the same thing regardless of whether it's in the Tablegen file or not.

Maybe it's the adding of the implicit operand that you need to inhibit in your case?


https://reviews.llvm.org/D46837