[PATCH] D46954: [X86][SSE] Support v4i32 rotations (PR37426)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: spatel, craig.topper, andreadb.

As suggested by Fabian on PR37426, we can use PMULUDQ to perform v4i32 vector rotations as the upper 32bits of the multiply will contain the 'wrapped' bits of the rotation.

v8i16/v16i8 rotations would be straightforward to add to lowerRotate in the future - ideally we'd mostly share code with the vector shifts lowering.


Repository:
  rL LLVM

https://reviews.llvm.org/D46954

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/vector-rotate-128.ll
  test/CodeGen/X86/vector-rotate-256.ll
  test/CodeGen/X86/vector-shift-shl-128.ll
  test/CodeGen/X86/vector-shift-shl-256.ll

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