[PATCH] D46591: [AArch64] Fix performPostLD1Combine to check for constant lane index.

[Javed Absar via Phabricator via llvm-commits]

javed.absar added inline comments.


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:9938
+    Lane = N->getOperand(2);
+    if (!isa<ConstantSDNode>(Lane))
+      return SDValue();
----------------
samparker wrote:
> Should the value of Lane also be checked for legality?
Maybe simpler to write it as :

// Check lane is a ...
if (IsLaneOp && !isa<ConstantSDNode>(N->getOperand(2)) 
   return ..



Repository:
  rL LLVM

https://reviews.llvm.org/D46591