[PATCH] D45204: [X86][MIPS][ARM] New machine instruction property 'isMoveReg'

[Nikola Prica via Phabricator via llvm-commits]

NikolaPrica added a comment.

@kparzysz There are already instructions that have different bits set for different opcodes. But you have a point. In purpose of creating useful interface for TII the best way may be to use such bit isPossilbe[copy/move] to exclude non-copy-instructions  and after exclusion return source and destination registers depending on opcode? Or just do it without MCInstDesc exclusion?
@sdardis What do you think about this?


https://reviews.llvm.org/D45204