[PATCH] D45204: [X86][MIPS][ARM] New machine instruction property 'isMoveReg'

Krzysztof Parzyszek via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 13 06:47:45 PDT 2018


kparzysz added a comment.

In https://reviews.llvm.org/D45204#1067117, @NikolaPrica wrote:

> I've firstly implemented like that but I've got comment that it might be better to implement it through table description instead of using multiple switch-case constructions for every register move instruction.


Yeah, I just saw that you have added a hook to TII.

The problem with bits in MCInstrDesc is that they apply to an opcode, not an instruction as a whole.  If a given instruction has a certain property regardless of what operands it has, then the descriptor solution is good.  In cases like "is-copy" (and a few others that are already there), it tells you a little, but not enough to be useful.  Specifically, in some cases, there is no way to tell whether an instruction is a copy without looking at its operands.  Moreover, in cases like "or reg, reg-always-zero", a target-independent pass will see two registers as inputs without knowing which is the one being copied.  Excluding instructions that aren't always copies would reduce the accuracy of your analysis without making it easy to improve it later on.  Following the logic of isCompare/isBranch, there could be a flag "could-be-copy" with the corresponding "analyzeCopy" or something like that that would tell the caller exactly what gets copied where.

I'm not going to oppose committing of this patch in the current form, I don't want it to bounce between two opposing ideas.  At the same time I want to emphasize that common interfaces should have enough generality to be useful outside of the current objectives.


https://reviews.llvm.org/D45204





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