[PATCH] D44920: [AMDGPU] Inline asm - added i16, half and i128 types support

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:7698
     }
+    // we actually support i128, i16 and f16 as inline parameters
+    // even if they are not reported as legal
----------------
Capitalize


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:7700-7701
+    // even if they are not reported as legal
+    if (RC && (isTypeLegal(VT) || MVT::i128 == VT.SimpleTy ||
+               MVT::i16 == VT.SimpleTy || MVT::f16 == VT.SimpleTy))
+      return std::make_pair(0U, RC);
----------------
Conditions backwards


================
Comment at: test/CodeGen/AMDGPU/inlineasm-16.ll:40
 }
 
 attributes #0 = { nounwind }
----------------
Should also test packed types here?


Repository:
  rL LLVM

https://reviews.llvm.org/D44920