[PATCH] D44654: [X86][SandyBridge] SBWriteResPair +5cy and +1uop Memory Folds

[Clement Courbet via Phabricator via llvm-commits]

courbet added a comment.

In https://reviews.llvm.org/D44654#1043354, @RKSimon wrote:

> Fixed comment and rebased patch.
>
> Another issue is WriteLoad is set to 4cy but WriteFLoad/WriteVecLoad is set to 6cy memory latency - there are a lot of inconsistencies in here.


When the data is in cache, I see latencies of 2 for MOV64rm,  3 for VMOVUPSrm, 4 for VMOVUPSYrm with llvm-exegesis (btw @craig.topper: why are all memory latencies shifted by 3? Is it to account for data that's not in the cache ?). So the values here seem reasonable if the 6cy is for the ymm version. Essentially this shows that the basic model is too simplistic for sandybridge; we really need the specialization per mnemonic. The specialization seem to be correct: VMOVUPSYrm has latency 7 (4+3), VMOVUPSrm 6 (3+3) and MOV64rm 5 (2+3).


Repository:
  rL LLVM

https://reviews.llvm.org/D44654