[PATCH] D42834: [RISCV] Implement c.lui immedate operand constraint

[Shiva Chen via Phabricator via llvm-commits]

shiva0217 updated this revision to Diff 135396.
shiva0217 added a comment.

Hi Alex. You're right. RISCVGenMCCodeEmitter.inc generated by tablegen will create mask according to the bit-field width defined in *.td. Upper bit's will filter out by the mask, so we don't have to define custom encoding method for c.lui. Thanks!


Repository:
  rL LLVM

https://reviews.llvm.org/D42834

Files:
  lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
  lib/Target/RISCV/RISCVInstrInfoC.td
  test/MC/RISCV/rv32c-invalid.s
  test/MC/RISCV/rv32c-valid.s

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