[llvm] r325432 - Fix unused variable warning. NFCI.

[David Blaikie via llvm-commits]

Ah *nod* nevermind - I misread/misunderstood the patch. Thanks for pointing
it out!

On Tue, Feb 20, 2018 at 12:37 PM Simon Pilgrim <llvm-dev at redking.me.uk>
wrote:

> Sorry, I don't understand - we don't need the AArch64InstrInfo variable at
> all, everything it was calling was a static method. There is no
> isa/dyn_cast style testing going on.
> On 20/02/2018 17:00, David Blaikie wrote:
>
> If you don't need the cast result - maybe use isa<> instead?
>
> On Sat, Feb 17, 2018 at 5:50 AM Simon Pilgrim via llvm-commits <
> llvm-commits at lists.llvm.org> wrote:
>
>> Author: rksimon
>> Date: Sat Feb 17 05:48:23 2018
>> New Revision: 325432
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=325432&view=rev
>> Log:
>> Fix unused variable warning. NFCI.
>>
>> We were casting to AArch64InstrInfo but only using it for static methods
>> which some compilers complain about.
>>
>> Modified:
>>     llvm/trunk/lib/Target/AArch64/AArch64MacroFusion.cpp
>>
>> Modified: llvm/trunk/lib/Target/AArch64/AArch64MacroFusion.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64MacroFusion.cpp?rev=325432&r1=325431&r2=325432&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Target/AArch64/AArch64MacroFusion.cpp (original)
>> +++ llvm/trunk/lib/Target/AArch64/AArch64MacroFusion.cpp Sat Feb 17
>> 05:48:23 2018
>> @@ -27,7 +27,6 @@ static bool shouldScheduleAdjacent(const
>>                                     const TargetSubtargetInfo &TSI,
>>                                     const MachineInstr *FirstMI,
>>                                     const MachineInstr &SecondMI) {
>> -  const AArch64InstrInfo &II = static_cast<const AArch64InstrInfo&>(TII);
>>    const AArch64Subtarget &ST = static_cast<const AArch64Subtarget&>(TSI);
>>
>>    // Assume wildcards for unspecified instrs.
>> @@ -66,7 +65,7 @@ static bool shouldScheduleAdjacent(const
>>        case AArch64::BICSWrs:
>>        case AArch64::BICSXrs:
>>          // Shift value can be 0 making these behave like the "rr"
>> variant...
>> -        return !II.hasShiftedReg(*FirstMI);
>> +        return !AArch64InstrInfo::hasShiftedReg(*FirstMI);
>>        case AArch64::INSTRUCTION_LIST_END:
>>          return true;
>>        }
>> @@ -108,7 +107,7 @@ static bool shouldScheduleAdjacent(const
>>        case AArch64::BICWrs:
>>        case AArch64::BICXrs:
>>          // Shift value can be 0 making these behave like the "rr"
>> variant...
>> -        return !II.hasShiftedReg(*FirstMI);
>> +        return !AArch64InstrInfo::hasShiftedReg(*FirstMI);
>>        case AArch64::INSTRUCTION_LIST_END:
>>          return true;
>>        }
>>
>>
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>
>
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