[llvm] r323174 - [X86] Remove 'NOREX' comment from the printing of _NOREX instructions.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 22 21:37:00 PST 2018
Author: ctopper
Date: Mon Jan 22 21:37:00 2018
New Revision: 323174
URL: http://llvm.org/viewvc/llvm-project?rev=323174&view=rev
Log:
[X86] Remove 'NOREX' comment from the printing of _NOREX instructions.
Some of the NOREX instructions are used in 32-bit mode making this printing confusing. It also doesn't provide a lot of value since you can see the h-register being used by the instruction.
Modified:
llvm/trunk/lib/Target/X86/X86InstrExtension.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/test/CodeGen/X86/bmi.ll
llvm/trunk/test/CodeGen/X86/bypass-slow-division-32.ll
llvm/trunk/test/CodeGen/X86/divrem.ll
llvm/trunk/test/CodeGen/X86/divrem8_ext.ll
llvm/trunk/test/CodeGen/X86/extract-store.ll
llvm/trunk/test/CodeGen/X86/h-registers-1.ll
llvm/trunk/test/CodeGen/X86/popcnt.ll
llvm/trunk/test/CodeGen/X86/tbm_patterns.ll
llvm/trunk/test/CodeGen/X86/urem-power-of-two.ll
Modified: llvm/trunk/lib/Target/X86/X86InstrExtension.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrExtension.td?rev=323174&r1=323173&r2=323174&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrExtension.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrExtension.td Mon Jan 22 21:37:00 2018
@@ -95,22 +95,22 @@ def MOVZX32rm16: I<0xB7, MRMSrcMem, (out
let hasSideEffects = 0, isCodeGenOnly = 1 in {
def MOVZX32_NOREXrr8 : I<0xB6, MRMSrcReg,
(outs GR32_NOREX:$dst), (ins GR8_NOREX:$src),
- "movz{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
+ "movz{bl|x}\t{$src, $dst|$dst, $src}",
[], IIC_MOVZX>, TB, OpSize32, Sched<[WriteALU]>;
let mayLoad = 1 in
def MOVZX32_NOREXrm8 : I<0xB6, MRMSrcMem,
(outs GR32_NOREX:$dst), (ins i8mem_NOREX:$src),
- "movz{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
+ "movz{bl|x}\t{$src, $dst|$dst, $src}",
[], IIC_MOVZX>, TB, OpSize32, Sched<[WriteALULd]>;
def MOVSX32_NOREXrr8 : I<0xBE, MRMSrcReg,
(outs GR32_NOREX:$dst), (ins GR8_NOREX:$src),
- "movs{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
+ "movs{bl|x}\t{$src, $dst|$dst, $src}",
[], IIC_MOVSX>, TB, OpSize32, Sched<[WriteALU]>;
let mayLoad = 1 in
def MOVSX32_NOREXrm8 : I<0xBE, MRMSrcMem,
(outs GR32_NOREX:$dst), (ins i8mem_NOREX:$src),
- "movs{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
+ "movs{bl|x}\t{$src, $dst|$dst, $src}",
[], IIC_MOVSX>, TB, OpSize32, Sched<[WriteALULd]>;
}
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=323174&r1=323173&r2=323174&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Jan 22 21:37:00 2018
@@ -1652,18 +1652,18 @@ let isCodeGenOnly = 1 in {
let hasSideEffects = 0 in
def MOV8rr_NOREX : I<0x88, MRMDestReg,
(outs GR8_NOREX:$dst), (ins GR8_NOREX:$src),
- "mov{b}\t{$src, $dst|$dst, $src} # NOREX", [], IIC_MOV>,
+ "mov{b}\t{$src, $dst|$dst, $src}", [], IIC_MOV>,
Sched<[WriteMove]>;
let mayStore = 1, hasSideEffects = 0 in
def MOV8mr_NOREX : I<0x88, MRMDestMem,
(outs), (ins i8mem_NOREX:$dst, GR8_NOREX:$src),
- "mov{b}\t{$src, $dst|$dst, $src} # NOREX", [],
+ "mov{b}\t{$src, $dst|$dst, $src}", [],
IIC_MOV_MEM>, Sched<[WriteStore]>;
let mayLoad = 1, hasSideEffects = 0,
canFoldAsLoad = 1, isReMaterializable = 1 in
def MOV8rm_NOREX : I<0x8A, MRMSrcMem,
(outs GR8_NOREX:$dst), (ins i8mem_NOREX:$src),
- "mov{b}\t{$src, $dst|$dst, $src} # NOREX", [],
+ "mov{b}\t{$src, $dst|$dst, $src}", [],
IIC_MOV_MEM>, Sched<[WriteLoad]>;
}
Modified: llvm/trunk/test/CodeGen/X86/bmi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bmi.ll?rev=323174&r1=323173&r2=323174&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bmi.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bmi.ll Mon Jan 22 21:37:00 2018
@@ -316,7 +316,7 @@ define i32 @bextr32_subreg(i32 %x) uwta
; CHECK-LABEL: bextr32_subreg:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
-; CHECK-NEXT: movzbl %ah, %eax # NOREX
+; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: retq
%1 = lshr i32 %x, 8
%2 = and i32 %1, 255
@@ -374,7 +374,7 @@ define i64 @bextr64_subreg(i64 %x) uwta
; CHECK-LABEL: bextr64_subreg:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
-; CHECK-NEXT: movzbl %ah, %eax # NOREX
+; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: retq
%1 = lshr i64 %x, 8
%2 = and i64 %1, 255
Modified: llvm/trunk/test/CodeGen/X86/bypass-slow-division-32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bypass-slow-division-32.ll?rev=323174&r1=323173&r2=323174&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bypass-slow-division-32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bypass-slow-division-32.ll Mon Jan 22 21:37:00 2018
@@ -43,7 +43,7 @@ define i32 @Test_get_remainder(i32 %a, i
; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: # kill: def %eax killed %eax def %ax
; CHECK-NEXT: divb %cl
-; CHECK-NEXT: movzbl %ah, %eax # NOREX
+; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: retl
%result = srem i32 %a, %b
ret i32 %result
@@ -67,7 +67,7 @@ define i32 @Test_get_quotient_and_remain
; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: # kill: def %eax killed %eax def %ax
; CHECK-NEXT: divb %cl
-; CHECK-NEXT: movzbl %ah, %edx # NOREX
+; CHECK-NEXT: movzbl %ah, %edx
; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: retl
Modified: llvm/trunk/test/CodeGen/X86/divrem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/divrem.ll?rev=323174&r1=323173&r2=323174&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/divrem.ll (original)
+++ llvm/trunk/test/CodeGen/X86/divrem.ll Mon Jan 22 21:37:00 2018
@@ -122,7 +122,7 @@ define void @si8(i8 %x, i8 %y, i8* %p, i
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: cbtw
; X32-NEXT: idivb {{[0-9]+}}(%esp)
-; X32-NEXT: movsbl %ah, %ebx # NOREX
+; X32-NEXT: movsbl %ah, %ebx
; X32-NEXT: movb %al, (%edx)
; X32-NEXT: movb %bl, (%ecx)
; X32-NEXT: popl %ebx
@@ -133,7 +133,7 @@ define void @si8(i8 %x, i8 %y, i8* %p, i
; X64-NEXT: movl %edi, %eax
; X64-NEXT: cbtw
; X64-NEXT: idivb %sil
-; X64-NEXT: movsbl %ah, %esi # NOREX
+; X64-NEXT: movsbl %ah, %esi
; X64-NEXT: movb %al, (%rdx)
; X64-NEXT: movb %sil, (%rcx)
; X64-NEXT: retq
@@ -264,7 +264,7 @@ define void @ui8(i8 %x, i8 %y, i8* %p, i
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: # kill: def %eax killed %eax def %ax
; X32-NEXT: divb {{[0-9]+}}(%esp)
-; X32-NEXT: movzbl %ah, %ebx # NOREX
+; X32-NEXT: movzbl %ah, %ebx
; X32-NEXT: movb %al, (%edx)
; X32-NEXT: movb %bl, (%ecx)
; X32-NEXT: popl %ebx
@@ -275,7 +275,7 @@ define void @ui8(i8 %x, i8 %y, i8* %p, i
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: # kill: def %eax killed %eax def %ax
; X64-NEXT: divb %sil
-; X64-NEXT: movzbl %ah, %esi # NOREX
+; X64-NEXT: movzbl %ah, %esi
; X64-NEXT: movb %al, (%rdx)
; X64-NEXT: movb %sil, (%rcx)
; X64-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/divrem8_ext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/divrem8_ext.ll?rev=323174&r1=323173&r2=323174&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/divrem8_ext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/divrem8_ext.ll Mon Jan 22 21:37:00 2018
@@ -8,7 +8,7 @@ define zeroext i8 @test_udivrem_zext_ah(
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: # kill: def %eax killed %eax def %ax
; X32-NEXT: divb {{[0-9]+}}(%esp)
-; X32-NEXT: movzbl %ah, %ecx # NOREX
+; X32-NEXT: movzbl %ah, %ecx
; X32-NEXT: movb %al, z
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: retl
@@ -18,7 +18,7 @@ define zeroext i8 @test_udivrem_zext_ah(
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: # kill: def %eax killed %eax def %ax
; X64-NEXT: divb %sil
-; X64-NEXT: movzbl %ah, %ecx # NOREX
+; X64-NEXT: movzbl %ah, %ecx
; X64-NEXT: movb %al, {{.*}}(%rip)
; X64-NEXT: movl %ecx, %eax
; X64-NEXT: retq
@@ -34,7 +34,7 @@ define zeroext i8 @test_urem_zext_ah(i8
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: # kill: def %eax killed %eax def %ax
; X32-NEXT: divb {{[0-9]+}}(%esp)
-; X32-NEXT: movzbl %ah, %eax # NOREX
+; X32-NEXT: movzbl %ah, %eax
; X32-NEXT: # kill: def %al killed %al killed %eax
; X32-NEXT: retl
;
@@ -43,7 +43,7 @@ define zeroext i8 @test_urem_zext_ah(i8
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: # kill: def %eax killed %eax def %ax
; X64-NEXT: divb %sil
-; X64-NEXT: movzbl %ah, %eax # NOREX
+; X64-NEXT: movzbl %ah, %eax
; X64-NEXT: # kill: def %al killed %al killed %eax
; X64-NEXT: retq
%1 = urem i8 %x, %y
@@ -57,7 +57,7 @@ define i8 @test_urem_noext_ah(i8 %x, i8
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: # kill: def %eax killed %eax def %ax
; X32-NEXT: divb %cl
-; X32-NEXT: movzbl %ah, %eax # NOREX
+; X32-NEXT: movzbl %ah, %eax
; X32-NEXT: addb %cl, %al
; X32-NEXT: # kill: def %al killed %al killed %eax
; X32-NEXT: retl
@@ -67,7 +67,7 @@ define i8 @test_urem_noext_ah(i8 %x, i8
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: # kill: def %eax killed %eax def %ax
; X64-NEXT: divb %sil
-; X64-NEXT: movzbl %ah, %eax # NOREX
+; X64-NEXT: movzbl %ah, %eax
; X64-NEXT: addb %sil, %al
; X64-NEXT: # kill: def %al killed %al killed %eax
; X64-NEXT: retq
@@ -82,7 +82,7 @@ define i64 @test_urem_zext64_ah(i8 %x, i
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: # kill: def %eax killed %eax def %ax
; X32-NEXT: divb {{[0-9]+}}(%esp)
-; X32-NEXT: movzbl %ah, %eax # NOREX
+; X32-NEXT: movzbl %ah, %eax
; X32-NEXT: xorl %edx, %edx
; X32-NEXT: retl
;
@@ -91,7 +91,7 @@ define i64 @test_urem_zext64_ah(i8 %x, i
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: # kill: def %eax killed %eax def %ax
; X64-NEXT: divb %sil
-; X64-NEXT: movzbl %ah, %eax # NOREX
+; X64-NEXT: movzbl %ah, %eax
; X64-NEXT: retq
%1 = urem i8 %x, %y
%2 = zext i8 %1 to i64
@@ -104,7 +104,7 @@ define signext i8 @test_sdivrem_sext_ah(
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: cbtw
; X32-NEXT: idivb {{[0-9]+}}(%esp)
-; X32-NEXT: movsbl %ah, %ecx # NOREX
+; X32-NEXT: movsbl %ah, %ecx
; X32-NEXT: movb %al, z
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: retl
@@ -114,7 +114,7 @@ define signext i8 @test_sdivrem_sext_ah(
; X64-NEXT: movl %edi, %eax
; X64-NEXT: cbtw
; X64-NEXT: idivb %sil
-; X64-NEXT: movsbl %ah, %ecx # NOREX
+; X64-NEXT: movsbl %ah, %ecx
; X64-NEXT: movb %al, {{.*}}(%rip)
; X64-NEXT: movl %ecx, %eax
; X64-NEXT: retq
@@ -130,7 +130,7 @@ define signext i8 @test_srem_sext_ah(i8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: cbtw
; X32-NEXT: idivb {{[0-9]+}}(%esp)
-; X32-NEXT: movsbl %ah, %eax # NOREX
+; X32-NEXT: movsbl %ah, %eax
; X32-NEXT: # kill: def %al killed %al killed %eax
; X32-NEXT: retl
;
@@ -139,7 +139,7 @@ define signext i8 @test_srem_sext_ah(i8
; X64-NEXT: movl %edi, %eax
; X64-NEXT: cbtw
; X64-NEXT: idivb %sil
-; X64-NEXT: movsbl %ah, %eax # NOREX
+; X64-NEXT: movsbl %ah, %eax
; X64-NEXT: # kill: def %al killed %al killed %eax
; X64-NEXT: retq
%1 = srem i8 %x, %y
@@ -153,7 +153,7 @@ define i8 @test_srem_noext_ah(i8 %x, i8
; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
; X32-NEXT: cbtw
; X32-NEXT: idivb %cl
-; X32-NEXT: movsbl %ah, %eax # NOREX
+; X32-NEXT: movsbl %ah, %eax
; X32-NEXT: addb %cl, %al
; X32-NEXT: # kill: def %al killed %al killed %eax
; X32-NEXT: retl
@@ -163,7 +163,7 @@ define i8 @test_srem_noext_ah(i8 %x, i8
; X64-NEXT: movl %edi, %eax
; X64-NEXT: cbtw
; X64-NEXT: idivb %sil
-; X64-NEXT: movsbl %ah, %eax # NOREX
+; X64-NEXT: movsbl %ah, %eax
; X64-NEXT: addb %sil, %al
; X64-NEXT: # kill: def %al killed %al killed %eax
; X64-NEXT: retq
@@ -178,7 +178,7 @@ define i64 @test_srem_sext64_ah(i8 %x, i
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: cbtw
; X32-NEXT: idivb {{[0-9]+}}(%esp)
-; X32-NEXT: movsbl %ah, %eax # NOREX
+; X32-NEXT: movsbl %ah, %eax
; X32-NEXT: movl %eax, %edx
; X32-NEXT: sarl $31, %edx
; X32-NEXT: retl
@@ -188,7 +188,7 @@ define i64 @test_srem_sext64_ah(i8 %x, i
; X64-NEXT: movl %edi, %eax
; X64-NEXT: cbtw
; X64-NEXT: idivb %sil
-; X64-NEXT: movsbl %ah, %eax # NOREX
+; X64-NEXT: movsbl %ah, %eax
; X64-NEXT: cltq
; X64-NEXT: retq
%1 = srem i8 %x, %y
@@ -202,7 +202,7 @@ define i64 @pr25754(i8 %a, i8 %c) {
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: # kill: def %eax killed %eax def %ax
; X32-NEXT: divb {{[0-9]+}}(%esp)
-; X32-NEXT: movzbl %ah, %ecx # NOREX
+; X32-NEXT: movzbl %ah, %ecx
; X32-NEXT: movzbl %al, %eax
; X32-NEXT: addl %ecx, %eax
; X32-NEXT: xorl %edx, %edx
@@ -213,7 +213,7 @@ define i64 @pr25754(i8 %a, i8 %c) {
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: # kill: def %eax killed %eax def %ax
; X64-NEXT: divb %sil
-; X64-NEXT: movzbl %ah, %ecx # NOREX
+; X64-NEXT: movzbl %ah, %ecx
; X64-NEXT: movzbl %al, %eax
; X64-NEXT: addq %rcx, %rax
; X64-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/extract-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extract-store.ll?rev=323174&r1=323173&r2=323174&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/extract-store.ll (original)
+++ llvm/trunk/test/CodeGen/X86/extract-store.ll Mon Jan 22 21:37:00 2018
@@ -114,7 +114,7 @@ define void @extract_i8_15(i8* nocapture
; SSE2-X64-LABEL: extract_i8_15:
; SSE2-X64: # %bb.0:
; SSE2-X64-NEXT: pextrw $7, %xmm0, %eax
-; SSE2-X64-NEXT: movb %ah, (%rdi) # NOREX
+; SSE2-X64-NEXT: movb %ah, (%rdi)
; SSE2-X64-NEXT: retq
;
; SSE41-X32-LABEL: extract_i8_15:
@@ -142,7 +142,7 @@ define void @extract_i8_15(i8* nocapture
; SSE-F128-LABEL: extract_i8_15:
; SSE-F128: # %bb.0:
; SSE-F128-NEXT: pextrw $7, %xmm0, %eax
-; SSE-F128-NEXT: movb %ah, (%rdi) # NOREX
+; SSE-F128-NEXT: movb %ah, (%rdi)
; SSE-F128-NEXT: retq
%vecext = extractelement <16 x i8> %foo, i32 15
store i8 %vecext, i8* %dst, align 1
Modified: llvm/trunk/test/CodeGen/X86/h-registers-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-registers-1.ll?rev=323174&r1=323173&r2=323174&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/h-registers-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/h-registers-1.ll Mon Jan 22 21:37:00 2018
@@ -18,20 +18,20 @@ define i64 @foo(i64 %a, i64 %b, i64 %c,
; CHECK-NEXT: .cfi_offset %rbp, -16
; CHECK-NEXT: movq %rsi, %rax
; CHECK-NEXT: movq %rdi, %rbx
-; CHECK-NEXT: movzbl %bh, %esi # NOREX
-; CHECK-NEXT: movzbl %ah, %eax # NOREX
+; CHECK-NEXT: movzbl %bh, %esi
+; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: movq %rax, %r10
-; CHECK-NEXT: movzbl %dh, %edx # NOREX
-; CHECK-NEXT: movzbl %ch, %eax # NOREX
+; CHECK-NEXT: movzbl %dh, %edx
+; CHECK-NEXT: movzbl %ch, %eax
; CHECK-NEXT: movq %rax, %r11
; CHECK-NEXT: movq %r8, %rax
-; CHECK-NEXT: movzbl %ah, %ecx # NOREX
+; CHECK-NEXT: movzbl %ah, %ecx
; CHECK-NEXT: movq %r9, %rax
-; CHECK-NEXT: movzbl %ah, %ebp # NOREX
+; CHECK-NEXT: movzbl %ah, %ebp
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
-; CHECK-NEXT: movzbl %ah, %eax # NOREX
+; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %ebx
-; CHECK-NEXT: movzbl %bh, %edi # NOREX
+; CHECK-NEXT: movzbl %bh, %edi
; CHECK-NEXT: movq %r10, %r8
; CHECK-NEXT: addq %r8, %rsi
; CHECK-NEXT: addq %r11, %rdx
@@ -54,20 +54,20 @@ define i64 @foo(i64 %a, i64 %b, i64 %c,
; GNUX32-NEXT: .cfi_offset %rbp, -16
; GNUX32-NEXT: movq %rsi, %rax
; GNUX32-NEXT: movq %rdi, %rbx
-; GNUX32-NEXT: movzbl %bh, %esi # NOREX
-; GNUX32-NEXT: movzbl %ah, %eax # NOREX
+; GNUX32-NEXT: movzbl %bh, %esi
+; GNUX32-NEXT: movzbl %ah, %eax
; GNUX32-NEXT: movq %rax, %r10
-; GNUX32-NEXT: movzbl %dh, %edx # NOREX
-; GNUX32-NEXT: movzbl %ch, %eax # NOREX
+; GNUX32-NEXT: movzbl %dh, %edx
+; GNUX32-NEXT: movzbl %ch, %eax
; GNUX32-NEXT: movq %rax, %r11
; GNUX32-NEXT: movq %r8, %rax
-; GNUX32-NEXT: movzbl %ah, %ecx # NOREX
+; GNUX32-NEXT: movzbl %ah, %ecx
; GNUX32-NEXT: movq %r9, %rax
-; GNUX32-NEXT: movzbl %ah, %ebp # NOREX
+; GNUX32-NEXT: movzbl %ah, %ebp
; GNUX32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; GNUX32-NEXT: movzbl %ah, %eax # NOREX
+; GNUX32-NEXT: movzbl %ah, %eax
; GNUX32-NEXT: movl {{[0-9]+}}(%esp), %ebx
-; GNUX32-NEXT: movzbl %bh, %edi # NOREX
+; GNUX32-NEXT: movzbl %bh, %edi
; GNUX32-NEXT: movq %r10, %r8
; GNUX32-NEXT: addq %r8, %rsi
; GNUX32-NEXT: addq %r11, %rdx
Modified: llvm/trunk/test/CodeGen/X86/popcnt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/popcnt.ll?rev=323174&r1=323173&r2=323174&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/popcnt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/popcnt.ll Mon Jan 22 21:37:00 2018
@@ -77,7 +77,7 @@ define i16 @cnt16(i16 %x) nounwind readn
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: shll $8, %eax
; X32-NEXT: addl %ecx, %eax
-; X32-NEXT: movzbl %ah, %eax # NOREX
+; X32-NEXT: movzbl %ah, %eax
; X32-NEXT: # kill: def %ax killed %ax killed %eax
; X32-NEXT: retl
;
@@ -99,7 +99,7 @@ define i16 @cnt16(i16 %x) nounwind readn
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: shll $8, %ecx
; X64-NEXT: addl %eax, %ecx
-; X64-NEXT: movzbl %ch, %eax # NOREX
+; X64-NEXT: movzbl %ch, %eax
; X64-NEXT: # kill: def %ax killed %ax killed %eax
; X64-NEXT: retq
;
Modified: llvm/trunk/test/CodeGen/X86/tbm_patterns.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm_patterns.ll?rev=323174&r1=323173&r2=323174&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm_patterns.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm_patterns.ll Mon Jan 22 21:37:00 2018
@@ -18,7 +18,7 @@ define i32 @test_x86_tbm_bextri_u32_subr
; CHECK-LABEL: test_x86_tbm_bextri_u32_subreg:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
-; CHECK-NEXT: movzbl %ah, %eax # NOREX
+; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: retq
%t0 = lshr i32 %a, 8
%t1 = and i32 %t0, 255
@@ -79,7 +79,7 @@ define i64 @test_x86_tbm_bextri_u64_subr
; CHECK-LABEL: test_x86_tbm_bextri_u64_subreg:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
-; CHECK-NEXT: movzbl %ah, %eax # NOREX
+; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: retq
%t0 = lshr i64 %a, 8
%t1 = and i64 %t0, 255
Modified: llvm/trunk/test/CodeGen/X86/urem-power-of-two.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/urem-power-of-two.ll?rev=323174&r1=323173&r2=323174&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/urem-power-of-two.ll (original)
+++ llvm/trunk/test/CodeGen/X86/urem-power-of-two.ll Mon Jan 22 21:37:00 2018
@@ -83,7 +83,7 @@ define i8 @and_pow_2(i8 %x, i8 %y) {
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: # kill: def %eax killed %eax def %ax
; X86-NEXT: divb %cl
-; X86-NEXT: movzbl %ah, %eax # NOREX
+; X86-NEXT: movzbl %ah, %eax
; X86-NEXT: # kill: def %al killed %al killed %eax
; X86-NEXT: retl
;
@@ -93,7 +93,7 @@ define i8 @and_pow_2(i8 %x, i8 %y) {
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: # kill: def %eax killed %eax def %ax
; X64-NEXT: divb %sil
-; X64-NEXT: movzbl %ah, %eax # NOREX
+; X64-NEXT: movzbl %ah, %eax
; X64-NEXT: # kill: def %al killed %al killed %eax
; X64-NEXT: retq
%and = and i8 %y, 4
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