[PATCH] D42124: SI Load Store Optimizer: When merging with offset, use V_ADD_{I|U}32_e64

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:501
+    unsigned CarryReg = MRI->createVirtualRegister(&AMDGPU::SReg_64RegClass);
+    BuildMI(*MBB, CI.Paired, DL, TII->get(AMDGPU::V_MOV_B32_e32), ImmReg)
+      .addImm(CI.BaseOff);
----------------
Use COPY, not MOV.


================
Comment at: lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:510
     BuildMI(*MBB, CI.Paired, DL, TII->get(AddOpc), BaseReg)
-      .addImm(CI.BaseOff)
+      .addReg(CarryReg, RegState::Define)
+      .addReg(ImmReg)
----------------
If this is a no carry version, carry should not be added.
In general do not create instruction manually, use SIInstrInfo::getAddNoCarry().


================
Comment at: test/CodeGen/AMDGPU/merge-load-store-vreg.mir:1
+# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-load-store-opt -o - %s | FileCheck %s
+
----------------
Need test for both add with without carry.


https://reviews.llvm.org/D42124