[PATCH] D42124: SI Load Store Optimizer: When merging with offset, use V_ADD_{I|U}32_e64

[Mark Searles via Phabricator via llvm-commits]

msearles created this revision.
msearles added a reviewer: rampitec.
msearles added a project: AMDGPU.
Herald added subscribers: nhaehnle, arsenm.

- Change inserted add ( V_ADD_{I|U}32_e32 ) to _e64 version ( V_ADD_{I|U}32_e64 ) so that the add uses a vreg for the carry; this prevents inserted v_add from killing VCC; the _e64 version doesn't accept a literal in its encoding, so we need to introduce a mov instr as well to get the imm into a register to be used in add instr.

- Change pass name to "SI Load Store Optimizer"; this removes the '/', which complicates scripts.


https://reviews.llvm.org/D42124

Files:
  lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  test/CodeGen/AMDGPU/merge-load-store-vreg.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D42124.130007.patch
Type: text/x-patch
Size: 5649 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180116/f3d74a44/attachment.bin>